MC68HC05E0 Datasheet, PDF (53/96 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

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PARALLEL INPUT/OUTPUT PORTS
6.1
Bidirectional Ports
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Ports A, B, C, and D are bidirectional 8-bit ports and Port E is a 4-bit bidirectional port and may be
configured as inputs or outputs under software control. The Port E lines are associated with bits
0–3 in the Port E data and data direction registers. The direction of any port line is determined by
the state of the corresponding bit in the data direction register (DDR). Any port line is configured
as an output if its corresponding DDR bit set to a logic one. A pin is configured as an input if its
DDR bit is cleared to a logic zero. At power-on or reset, all DDRs are cleared to $00 (with the
exception of DDRE which is set to $F0), which configures all I/O lines as inputs. (Note that, on
reset, bit 0 of the Port D Mode register is set to one, thereby forcing Port D bit 0 to output the P02
clock signal.) All data and data direction registers can be written to and read by the CPU. Refer to
Figure 6-1.
MC68HC05E0
PARALLEL INPUT/OUTPUT PORTS
MOTOROLA
6-1