MC68HC05E0 Datasheet, PDF (45/96 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

INTFX, INTFA, INTFB
These three bits (Interrupt Flag and Acknowledge) indicate the occurrence of interrupt signals
from INTX (external interrupt), Timer A and Timer B. Timers A and B generate interrupt signals
when their final values are reached:
1 (set) – Interrupt has occurred
0 (clear) – Interrupt has not occurred
Writing a “0” to one of these bits acknowledges the interrupt and resets the interrupt signal.
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INTXP
The INTXP bit (Program External Interrupt) selects which signal edge or level on the INTX input
generates an external interrupt:
1 (set) – Interrupt on rising edge or logic high level
0 (clear) – Interrupt on falling edge or logic low level
This bit only influences the effect of a signal coming from an external source (INTX) but not the
function of the IRQB signal to the microprocessor.
WAKF
The WAKF bit (Wake-up Flag) indicates that an interrupt was generated by the Wake-up function
on Port C:
1 (set) – Interrupt caused by wake-up function
0 (clear) – Interrupt not caused by wake-up function
Writing a “0” to one of these bits acknowledges the interrupt and resets the interrupt signal.
Additional control of external interrupts is achieved via the PITX bit in the Timer Control Register
($000C):
Timer control register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
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PITX
The PITX bit (Program Interrupt Type eXternal) provides additional control of external interrupts
by selecting either edge or level sensitive triggering.
1 (set) – Level-triggered interrupt selected
0 (clear) – Edge-triggered only interrupt selected
MC68HC05E0
RESETS, INTERRUPTS AND LOW POWER MODES
MOTOROLA
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