MC68HC08JK1 Datasheet, PDF (29/198 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Memory
I/O Section
2.3 I/O Section
Addresses $0000–$003F, shown in Figure 2-2, contain most of the
control, status, and data registers. Additional I/O registers have the
following addresses:
• $FE00 (Break Status Register, BSR)
• $FE01 (Reset Status Register, RSR)
• $FE02 (Reserved, SUBAR)
• $FE03 (Break Flag Control Register, BFCR)
• $FE04 (Interrupt Status Register 1, INT1)
• $FE05 (Interrupt Status Register 2, INT2)
• $FE06 (Interrupt Status Register 3, INT3)
• $FE07 (Reserved)
• $FE08 (Reserved)
• $FE09 (Reserved)
• $FE0A (Reserved)
• $FE0B (Reserved)
• $FE0C (Break Address Register High, BRKH)
• $FE0D (Break Address Register Low, BRKL)
• $FE0E (Break Status and Control Register, BRKSCR)
• $FE0F (Reserved)
• $FFFF (COP Control Register, COPCTL)
2.4 Monitor ROM
The 960 bytes at addresses $FC00–$FDFF and $FE10–$FFCF are
reserved ROM addresses that contain the instructions for the monitor
functions. (See Section 9. Monitor ROM (MON).)
MC68H(R)C08JL3 — Rev. 4
MOTOROLA
Memory
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Technical Data
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