MC68HC08JK1 Datasheet, PDF (144/198 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Ports
Freescale Semiconductor, Inc.
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1. Figure 12-8 shows
the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Technical Data
144
To Analog-To-Digital Converter
Figure 12-8. Port B I/O Circuit
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit. Table 12-2summarizes the operation
of the port B pins.
Table 12-2. Port B Pin Functions
DDRB Bit
0
PTB Bit
X⁽¹⁾
I/O Pin Mode
Input, Hi-Z⁽²⁾
Accesses to DDRB
Read/Write
DDRB7-DDRB0
Accesses to PTB
Read Write
Pin PTB[7:0]⁽³⁾
1
X
Output
DDRB7-DDRB0
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect the input.
Pin PTB[7:0]
I/O Ports
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MC68H(R)C08JL3 — Rev. 4
MOTOROLA