MC68HC08JK1 Datasheet, PDF (154/198 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
External Interrupt (IRQ)
IRQF1 — IRQ1 Flag
This read-only status bit is high when the IRQ1 interrupt is pending.
1 = IRQ1 interrupt pending
0 = IRQ1 interrupt not pending
ACK1 — IRQ1 Interrupt Request Acknowledge Bit
Writing a logic one to this write-only bit clears the IRQ1 latch. ACK1
always reads as logic zero. Reset clears ACK1.
IMASK1 — IRQ1 Interrupt Mask Bit
Writing a logic one to this read/write bit disables IRQ1 interrupt
requests. Reset clears IMASK1.
1 = IRQ1 interrupt requests disabled
0 = IRQ1 interrupt requests enabled
MODE1 — IRQ1 Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ1 pin.
Reset clears MODE1.
1 = IRQ1 interrupt requests on falling edges and low levels
0 = IRQ1 interrupt requests on falling edges only
Address: $001E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
IRQPUD R
R
LVIT1 LVIT0
R
R
R
Write:
Reset: 0
0
0
Not affected Not affected
0
0
0
POR: 0
0
0
0
0
0
0
0
R = Reserved
Figure 13-4. Configuration Register 2 (CONFIG2)
IRQPUD — IRQ1 Pin Pull-up control bit
1 = Internal pull-up is disconnected
0 = Internal pull-up is connected between IRQ1 pin and V_DD
Technical Data
154
External Interrupt (IRQ)
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MC68H(R)C08JL3 — Rev. 4
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