MC68HC08JK1 Datasheet, PDF (177/198 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Break Module (BREAK)
Break Module Registers
17.5.1 Break Status and Control Register (BRKSCR)
The break status and control register contains break module enable and
status bits.
Address: $FE0E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
0
0
BRKE BRKA
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 17-3. Break Status and Control Register (BRKSCR)
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches.
Clear BRKE by writing a logic zero to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
BRKA — Break Active Bit
This read/write status and control bit is set when a break address
match occurs. Writing a logic one to BRKA generates a break
interrupt. Clear BRKA by writing a logic zero to it before exiting the
break routine. Reset clears the BRKA bit.
1 = Break address match
0 = No break address match
MC68H(R)C08JL3 — Rev. 4
MOTOROLA
Break Module (BREAK)
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Technical Data
177