MC68HC08JK1 Datasheet, PDF (137/198 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Technical Data — MC68H(R)C08JL3
Section 12. I/O Ports
12.1 Contents
12.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
12.3 Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
12.3.1 Port A Data Register (PTA) . . . . . . . . . . . . . . . . . . . . . . . . 139
12.3.2 Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . . 140
12.3.3 Port A Input Pull-up Enable Register (PTAPUE) . . . . . . . . 141
12.4 Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
12.4.1 Port B Data Register (PTB) . . . . . . . . . . . . . . . . . . . . . . . . 143
12.4.2 Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . . 143
12.5 Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
12.5.1 Port D Data Register (PTD) . . . . . . . . . . . . . . . . . . . . . . . . 145
12.5.2 Data Direction Register D (DDRD). . . . . . . . . . . . . . . . . . . 146
12.5.3 Port D Control Register (PDCR). . . . . . . . . . . . . . . . . . . . . 147
12.2 Introduction
Twenty three bidirectional input-output (I/O) pins form three parallel
ports. All I/O pins are programmable as inputs or outputs.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
MC68H(R)C08JL3 — Rev. 4
MOTOROLA
I/O Ports
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Technical Data
137