SDA9415-B13 Datasheet, PDF (88/185 Pages) Micronas – Display Processor and Scan Rate Converter

SDA 9415 - B13
Preliminary Data Sheet
FRAME
FRAME/FIELD
FIELD A
odd lines
FIELD B
even lines
Content of picture
DISPLAY LINE-SCANNING PATTERN
TV
Display raster
odd lines
Display line-scanning
pattern ∼
even lines
Display line-scanning
pattern ϒ
Tube, Display raster
Figure 39 Explanation of field and display line-scanning pattern
The interlaced input signal (e.g. 50 Hz PAL or 60 Hz NTSC) is composed of a field A (odd
lines) and a field B (even lines).
Aⁿ - Input signal, field A at time n,
Bⁿ - Input signal, field B at time n
The field information describes the picture content. The output signal, which could
contain different picture contents (e.g. field A, field B) can be displayed with the display
line-scanning pattern ∼ or ϒ.
(Aⁿ,∼) - Output signal, field A at time n, displayed as line-scanning pattern ∼Ι
(Aⁿ,ϒ) - Output signal, field A at time n, displayed as line-scanning pattern ϒΙ
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Micronas