SDA9415-B13 Datasheet, PDF (38/185 Pages) Micronas – Display Processor and Scan Rate Converter

SDA 9415 - B13
Preliminary Data Sheet
System description
Vertical line size
2*ALPFM/S
(2*ALPFIPM/S=288)
288
INTVM/S
0
dezV/DEZVM/S
1/1
216
192
145
144
96
73
72
36
18
10
Table 11
171
1/1
256
1/1
505
1/1
0
2/4
256
2/4
497
2/4
0
4/5
0
8/6
0
16/7
409
16/7
Examples of vertical filter adjustment
Comment
largest size, bypass
recommended DEZVM/
DEZVS=0
Double window
PIP (1/3 picture)
smallest size
dezV
16
8
4
2
1
DEZVM / DEZVS
111
110
101
100
001
Table 12 Conversion table between dezV and DEZVM / DEZVS
The vertical compression block can be switched off by setting DEZVM/DEZVS equal “0”
and INTVM/INTVS=0. In this case it is possible to switch on a low pass filter for the
chrominance data path by the I²C Bus parameter CHFILM/CHFILS (I²C Bus parameter,
03h, 25h). If CHFILM/CHFILS is equal to “0” or “2” the vertical filter for the chrominance
is switched off. If CHFILM/CHFILS is equal to “1” or “3” the vertical filter for the
chrominance is switched on (Table 17 "Input write I²C Bus parameter CHFILM/
CHFILS" on page 42).
In addition a vertical peaking of the input signal is possible.
38
Micronas