SDA9415-B13 Datasheet, PDF (71/185 Pages) Micronas – Display Processor and Scan Rate Converter

SDA 9415 - B13
Preliminary Data Sheet
System description
5.6.6 Joint line free display
This chapter describes the I²C Bus parameters to get a joint line free display in SSC
mode.
I²C Bus
parameter
[Default]
RSHFTM
[0]
Sub address
55h
RSHFTS
55h
[0]
SHFTSTEP
55h
[0100]
PROG_THRES 56h
[0111100]
Description
Joint line free display of master channel by shifting the output raster
phase (SSC-Mode)
1: enabled
0: disabled
Joint line free display of master and slave channel by shifting the
output raster phase (SSC-Mode, RSHFTM=1)
1: enabled
0: disabled
Increment for raster phase shift per output frame (lines)
Threshold to display progressive PIP without joint lines
Table 59 Input write I²C Bus parameter
I²C Bus
parameter
SHIFTACT
Description
indicates active shifting process of the display raster phase
0: display phase shifting not active
1: display phase shift active
Table 60 Output read I²C Bus parameter
A special circuit is implemented to achieve a joint line free display in SSC mode (e.g.
Double Window Display). This circuit synchronizes the two input sources and removes
the joint lines by automatic controlled shifting of the display raster phase. This procedure
enlarges the value of OPDELM resulting in an delayed start of the output processing.
The I²C Bus parameters RSHFTM and RSHFTS enable joint line free display for master
and slave channel, separately. SHFTSTEP fixes the amount of lines which is added to
OPDELM with each output frame. The readable I²C Bus parameter SHIFTACT
signalizes the progressing shifting operation.
It is recommended to enable the registers RSHFTM and RSHFTS in all application
modes.
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Micronas