SDA9415-B13 Datasheet, PDF (86/185 Pages) Micronas – Display Processor and Scan Rate Converter

SDA 9415 - B13
Preliminary Data Sheet
VIN
RMODE=1
VOUT
RMODE=0
VOUT
Figure 38 VOUT generation depending on I²C Bus parameter RMODE
The polarity of the VOUT signal is programmable by the I²C Bus parameter VOUTPOL.
The VOUT signal has a delay of two CLKOUT clocks to the HOUT signal or in case of
interlaced a delay of a half line plus two CLKOUT clocks.
The INTERLACED signal can be used for AC-coupled deflections. Depending on the I²C
Bus parameter INTMODE the value of this signal will be generated. The Table 69 shows
the definition of this signal (compare "Operation mode generator" on page 87).
INTMODE
output field phase
0
INTMODE(0)
output field phase
1
INTMODE(1)
output field phase
2/0
INTMODE(2)
output field phase
3/1
INTMODE(3)
Table 69 Output write I²C Bus parameter INTMODE
I²C Bus
parameter
VOUTFR
1: free run
0: locked
mode
RMODE
1: progressive
0: interlaced
INTMODE
Sub address
4Ah
48h
49h
Description
VOUT generator mode select
line-scanning pattern mode
Free programmable INTERLACED signal for AC-coupled
deflection stages
Table 70 Output write I²C Bus parameter INTMODE
86
Micronas