SDA9415-B13 Datasheet, PDF (157/185 Pages) Micronas – Display Processor and Scan Rate Converter

SDA 9415 - B13
Preliminary Data Sheet
Sub address 4A
Bit
Name
Function
D7
x
x
D6
VOUTFR VOUT generator:
1: freerunning-mode
0: locked-mode
D5
HOUTFR HOUT generator
1: freerunning-mode
0: locked-mode
D4
VOUTPOL VOUT polarity:
1: low active
0: high active
D3
HOUTPOL HOUT polarity:
1: low active
0: high active
D2...D0 ^STOPMOS Static operation mode for slave channel [STOPMOS = 0]
Sub address 4B
Bit
Name
Function
D7
PRIORMS Priority of master or slave channel:
1: Master channel priority
0: Slave channel priority
D6...D5 FILSEL
Filter select for VDU interpolation
11: Improved median based interfield interpolation (SRC)
10: median based interfield interpolation
01: linear INTRAFIELD interpolation (SSC and MUP mode)
00: linear INTERFIELD interpolation
D4
MOVPHINV _{Inversion of internal MOVPH signal}
1: enabled
0: disabled
D3
ME-
Vector smoothing
SMOOTHON _{1: on}
0: off
157
Micronas