PIC16F688 Datasheet, PDF (74/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
REGISTER 9-1:
EEDAT – EEPROM DATA REGISTER (ADDRESS: 9Ah)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
EEDAT7 EEDAT6 EEDAT5 EEDAT4
EEDAT3
EEDAT2
bit 7
R/W-0
EEDAT1
R/W-0
EEDAT0
bit 0
bit 7-0
EEDATn: Byte Value to Write to or Read From Data EEPROM bits
REGISTER 9-2:
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
EEADR – EEPROM ADDRESS REGISTER (ADDRESS: 9Bh)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
EEADR7 EEADR6 EEADR5 EEADR4
EEADR3 EEADR2 EEADR1
bit 7
R/W-0
EEADR0
bit 0
bit 7-0
EEADR: Specifies One of 256 Locations for EEPROM Read/Write Operation bits
REGISTER 9-3:
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
EECON1 – EEPROM CONTROL REGISTER 1 (ADDRESS: 9Ch)
R/W-0
U-0
U-0
U-0
R/W-x
R/W-0
R/S-0
EEPGD
—
—
—
WRERR WREN
WR
bit 7
R/S-0
RD
bit 0
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
EEPGD: Program/Data EEPROM Select bit
1 = Accesses program memory
0 = Accesses data memory
Unimplemented: Read as ‘0’
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during
normal operation or BOD detect)
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
EEPGD = 1:
This bit is ignored
EEPGD = 0:
1 = Initiates a write cycle (The bit is cleared by hardware once write is complete. The WR bit can only be
set, not cleared, in software.)
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an memory read (Read takes one cycle. RD is cleared in hardware. The RD bit can only be
set, not cleared, in software.)
0 = Does not initiate an memory read
Legend:
S = Bit can only be set
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS41203B-page 72
Preliminary
 2004 Microchip Technology Inc.