 English |
|
|
|
|
|
|
|
| PIC16F688 Datasheet, PDF (40/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology | |||
| |||
| ◁ |
PIC16F688
4.2.4.5 RA4/AN3/T1G/OSC2/CLKOUT
Figure 4-5 shows the diagram for this pin. The RA4 pin
is configurable to function as one of the following:
⢠a general purpose I/O
⢠an analog input for the A/D
⢠a TMR1 gate input
⢠a crystal/resonator connection
⢠a clock output
FIGURE 4-5:
BLOCK DIAGRAM OF RA4
Data Bus
DQ
WR
WPUA
CK Q
Analog(3)
Input Mode CLK(1)
Modes
VDD
Weak
RD
WPUA
DQ
WR
PORTA
CK Q
WR
TRISA
DQ
CK Q
RD
TRISA
RD
PORTA
DQ
WR
IOCA
CK Q
RD
IOCA
RAPU
Oscillator
Circuit
OSC1
CLKOUT
Enable
Fosc/4 1
0
CLKOUT
Enable
INTOSC/
RC/EC(2)
CLKOUT
Enable
Analog(3)
Input Mode
VDD
I/O pin
VSS
QD
EN
Q3
QD
Interrupt-on-
change
To T1G
To A/D Converter
EN
RD PORTA
Note 1: CLK modes are XT, HS, LP, LPTMR1 and CLKOUT
Enable.
2: With CLKOUT option.
3: Analog Input mode is ANSEL.
4.2.4.6 RA5/T1CKI/OSC1/CLKIN
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
⢠a general purpose I/O
⢠a TMR1 clock input
⢠a crystal/resonator connection
⢠a clock input
FIGURE 4-6:
BLOCK DIAGRAM OF RA5
Data Bus
DQ
WR
WPUA
CK Q
RD
WPUA
DQ
WR
PORTA
CK Q
WR
TRISA
DQ
CK Q
RD
TRISA
RD
PORTA
DQ
WR
IOCA
CK Q
RD
IOCA
Interrupt-on-
change
INTOSC
Mode
TMR1LPEN(1)
VDD
Weak
RAPU
Oscillator
Circuit
OSC2
VDD
INTOSC
Mode
I/O pin
VSS
(2)
QD
EN
Q3
QD
EN
RD PORTA
To TMR1 or CLKGEN
Note
1: Timer1 LP oscillator enabled.
2: When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
DS41203B-page 38
Preliminary
 2004 Microchip Technology Inc.
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese