PIC16F688 Datasheet, PDF (66/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
8.1.4 CONVERSION CLOCK
The A/D conversion cycle requires 11 TAD. The source
of the conversion clock is software selectable via the
ADCS bits (ADCON1<6:4>). There are seven possible
clock options:
• FOSC/2
• FOSC/4
• FOSC/8
• FOSC/16
• FOSC/32
• FOSC/64
• FRC (dedicated internal oscillator)
For correct conversion, the A/D conversion clock
(1/TAD) must be selected to ensure a minimum TAD of
1.6 µs. Table 8-1 shows a few TAD calculations for
selected frequencies.
TABLE 8-1: TAD vs. DEVICE OPERATING FREQUENCIES
A/D Clock Source (TAD)
Device Frequency
Operation
2 TOSC
4 TOSC
8 TOSC
16 TOSC
32 TOSC
64 TOSC
A/D RC
ADCS<2:0>
000
100
001
101
010
110
x11
20 MHz
100 ns⁽²⁾
200 ns⁽²⁾
400 ns⁽²⁾
800 ns⁽²⁾
1.6 µs
3.2 µs
2-6 µs^(1,4)
5 MHz
400 ns⁽²⁾
800 ns⁽²⁾
1.6 µs
3.2 µs
6.4 µs
12.8 µs⁽³⁾
2-6 µs^(1,4)
4 MHz
500 ns⁽²⁾
1.0 µs⁽²⁾
2.0 µs
4.0 µs
8.0 µs⁽³⁾
16.0 µs⁽³⁾
2-6 µs^(1,4)
1.25 MHz
1.6 µs
3.2 µs
6.4 µs
12.8 µs⁽³⁾
25.6 µs⁽³⁾
51.2 µs⁽³⁾
2-6 µs^(1,4)
Legend: Shaded cells are outside of recommended range.
Note 1: The A/D RC source has a typical TAD time of 4 µs for VDD > 3.0V.
2: These values violate the minimum required TAD time.
3: For faster conversion times, the selection of another clock source is recommended.
4: When the device frequency is greater than 1 MHz, the A/D RC clock source is only recommended if the
conversion will be performed during Sleep.
8.1.5 STARTING A CONVERSION
The A/D conversion is initiated by setting the
GO/DONE bit (ADCON0<1>). When the conversion is
complete, the A/D module:
• Clears the GO/DONE bit
• Sets the ADIF flag (PIR1<6>)
• Generates an interrupt (if enabled)
If the conversion must be aborted, the GO/DONE bit
can be cleared in software. The ADRESH:ADRESL
registers will not be updated with the partially complete
A/D conversion sample. Instead, the
ADRESH:ADRESL registers will retain the value of the
previous conversion. After an aborted conversion, a
2 TAD delay is required before another acquisition can
be initiated. Following the delay, an input acquisition is
automatically started on the selected channel.
Note: The GO/DONE bit should not be set in the
same instruction that turns on the A/D.
DS41203B-page 64
Preliminary
 2004 Microchip Technology Inc.