PIC16F688 Datasheet, PDF (100/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
10.5.2 USART SYNCHRONOUS SLAVE
RECEPTION
The operation of the Synchronous Master and Slave
modes is identical, except in the case of Sleep, or any
IDLE mode and bit SREN, which is a “don't care” in
Slave mode.
If receive is enabled by setting the CREN bit prior to
entering Sleep, then a word may be received. Once the
word is received, the RSR register will transfer the data
to the RCREG register; if the RCIE enable bit is set, the
interrupt generated will wake the chip from Sleep. If the
global interrupt is enabled, the program will branch to
the interrupt vector.
To set up a Synchronous Slave Reception:
1. Enable the synchronous master serial port by
setting bits SYNC and SPEN and clearing bit
CSRC.
2. If interrupts are desired, set enable bit RCIE.
3. If 9-bit reception is desired, set bit RX9.
4. To enable reception, set enable bit CREN.
5. Flag bit RCIF will be set when reception is
complete. An interrupt will be generated if
enable bit RCIE was set.
6. Read the RCSTA register to get the 9th bit (if
enabled) and determine if any error occurred
during reception.
7. Read the 8-bit received data by reading the
RCREG register.
8. If any error occurred, clear the error by clearing
bit CREN.
9. If using interrupts, ensure that the GIE and PEIE
bits in the INTCON register (INTCON<7:6>) are
set.
TABLE 10-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
Addr Name
Bit 7
Bit 6
Bit 5 Bit 4
Bit 3 Bit 2 Bit 1
Bit 0
Value on
POR, BOD
Value on
all other
Resets
0Ch PIR1
EEIF
ADIF RCIF C2IF C1IF OSFIF TXIF TMR1IF 0000 0000 0000 0000
11h BAUDCTL ABDOVF RCIDL — SCKP BRG16 —
WUE ABDEN 00-0 0-00 00-0 0-00
12h SPBRGH USART Baud Rate High Generator
0000 0000 0000 0000
13h SPBRG USART Baud Rate Generator
0000 0000 0000 0000
14h RCREG USART Receive Register
0000 0000 0000 0000
15h TXREG USART Transmit Register
0000 0000 0000 0000
16h TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010
17h RCSTA
SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000X 0000 000X
8Ch PIE1
EEIE ADIE RCIE C2IE C1IE OSFIE TXIE TMR1IE 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for Asynchronous Reception.
DS41203B-page 98
Preliminary
 2004 Microchip Technology Inc.