PIC16F688 Datasheet, PDF (47/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
5.0 TIMER0 MODULE
The Timer0 module timer/counter has the following
features:
• 8-bit timer/counter
• Readable and writable
• 8-bit software programmable prescaler
• Internal or external clock select
• Interrupt on overflow from FFh to 00h
• Edge select for external clock
Figure 5-1 is a block diagram of the Timer0 module and
the prescaler shared with the WDT.
Note:
Additional information on the Timer0
module is available in the “PICmicro^® Mid-
Range MCU Family Reference Manual”
(DS33023).
5.1 Timer0 Operation
Timer mode is selected by clearing the T0CS bit
(OPTION_REG<5>). In Timer mode, the Timer0
module will increment every instruction cycle (without
prescaler). If TMR0 is written, the increment is inhibited
for the following two instruction cycles. The user can
work around this by writing an adjusted value to the
TMR0 register.
Counter mode is selected by setting the T0CS bit
(OPTION_REG<5>). In this mode, the Timer0 module
will increment either on every rising or falling edge of
pin RA2/T0CKI. The incrementing edge is determined
by the source edge (T0SE) control bit
(OPTION_REG<4>). Clearing the T0SE bit selects the
rising edge.
Note:
Counter mode has specific external clock
requirements. Additional information on
these requirements is available in the
”PICmicro^® Mid-Range MCU Family
Reference Manual” (DS33023).
5.2 Timer0 Interrupt
A Timer0 interrupt is generated when the TMR0 regis-
ter timer/counter overflows from FFh to 00h. This over-
flow sets the T0IF bit (INTCON<2>). The interrupt can
be masked by clearing the T0IE bit (INTCON<5>). The
T0IF bit must be cleared in software by the Timer0
module Interrupt Service Routine before re-enabling
this interrupt. The Timer0 interrupt cannot wake the
processor from Sleep, since the timer is shut off during
Sleep.
FIGURE 5-1:
CLKOUT
(= FOSC/4)
T0CKI
pin
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
0
1
0
T0CS
1
8-bit
Prescaler
1
SYNC 2
Cycles
0
PSA
Data Bus
8
TMR0
Set Flag bit T0IF
on Overflow
WDTE
SWDTEN
31 kHz
INTRC
8
PSA
Watchdog
Timer
16-bit
Prescaler ₁₆
PS<2:0>
WDTPS<3:0>
1
WDT
Time-out
0
PSA
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the Option register, WDTPS<3:0> are bits in the WDTCON register.
 2004 Microchip Technology Inc.
Preliminary
DS41203B-page 45