PIC16F688 Datasheet, PDF (167/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
INDEX
A
A/D
Acquisition Requirements ........................................... 68
Analog Port Pins ......................................................... 63
Associated Registers .................................................. 70
Block Diagram............................................................. 63
Calculating Acquisition Time....................................... 68
Channel Selection....................................................... 63
Configuration and Operation....................................... 63
Configuring.................................................................. 67
Configuring Interrupt ................................................... 67
Conversion (TAD) Cycles ............................................ 65
Conversion Clock........................................................ 64
Effects of Reset........................................................... 70
Internal Sampling Switch (RSS) Impedance................ 68
Operation During Sleep .............................................. 69
Output Format............................................................. 65
Reference Voltage (VREF)........................................... 63
Source Impedance...................................................... 68
Specifications............................................ 153, 154, 155
Starting a Conversion ................................................. 64
TAD vs. Operating Frequencies................................... 64
Absolute Maximum Ratings .............................................. 135
AC Characteristics
Industrial and Extended ............................................ 145
Load Conditions ........................................................ 144
ADCON0 Register............................................................... 66
ADCON1 Register............................................................... 66
Analog Front-end (AFE)
Power-On Reset ....................................................... 103
Analog Input Connections ................................................... 54
Analog-to-Digital Converter Module. See A/D
ANSEL Register .................................................................. 65
Assembler
MPASM Assembler................................................... 129
Auto Wake-up on SYNC Break Character .......................... 91
B
BAUDCTL Register ............................................................. 80
Block Diagrams
A/D .............................................................................. 63
Analog Input Model ............................................... 55, 68
Comparator 1 .............................................................. 57
Comparator 2 .............................................................. 57
Comparator Modes ..................................................... 56
Comparator Voltage Reference (CVREF) .................... 59
Fail-Safe Clock Monitor (FSCM) ................................. 28
In-Circuit Serial Programming Connections.............. 117
Interrupt Logic ........................................................... 110
MCLR Circuit............................................................. 103
On-Chip Reset Circuit ............................................... 102
PIC16F688.................................................................... 5
RA1 Pins ..................................................................... 36
RA2 Pin....................................................................... 37
RA3 Pin....................................................................... 37
RA4 Pin....................................................................... 38
RA5 Pin....................................................................... 38
RC0 and RC1 Pins...................................................... 40
RC2 and RC3 Pins...................................................... 41
RC4 Pin....................................................................... 41
RC5 Pin....................................................................... 42
Resonator Operation................................................... 23
System Clock .............................................................. 21
Timer1......................................................................... 49
TMR0/WDT Prescaler ................................................ 45
USART Receive ......................................................... 89
USART Transmit ........................................................ 87
Watchdog Timer (WDT)............................................ 113
Break Character (12-bit) Transmit and Receive ................. 92
Brown-out Detect (BOD)................................................... 104
Associated Registers................................................ 105
Calibration ................................................................ 104
Specifications ........................................................... 149
Timing and Characteristics ....................................... 148
C
C Compilers
MPLAB C17.............................................................. 130
MPLAB C18.............................................................. 130
MPLAB C30.............................................................. 130
CALIB Register ................................................................. 101
Clock Accuracy with Asynchronous Operation ................... 77
CMCON0 Register.............................................................. 53
CMCON1 Register.............................................................. 58
Code Examples
A/D Conversion .......................................................... 67
Assigning Prescaler to Timer0.................................... 47
Assigning Prescaler to WDT....................................... 47
Indirect Addressing..................................................... 20
Initializing PORTA ...................................................... 31
Initializing PORTC ...................................................... 40
Saving Status and W Registers in RAM ................... 112
Ultra Low-Power Wake-up Initialization...................... 34
Code Protection ................................................................ 117
Comparator Module ............................................................ 53
Comparator Voltage Reference (CVREF)
Associated Registers.................................................. 61
Effects of a Reset ....................................................... 60
Response Time .......................................................... 60
Comparator Voltage Reference (CVREF)............................ 59
Accuracy/Error............................................................ 59
Configuring ................................................................. 59
Specifications ........................................................... 152
Comparators
Associated Registers.................................................. 61
C2OUT as T1 Gate............................................... 50, 58
Configurations ............................................................ 56
Effects of a Reset ....................................................... 60
Interrupts .................................................................... 58
Operation.................................................................... 54
Operation During Sleep .............................................. 60
Outputs ....................................................................... 58
Response Time .......................................................... 60
Specifications ........................................................... 152
Synchronizing C2OUT w/ Timer1 ............................... 58
CONFIG Register ............................................................. 100
Configuration Bits ..................................................... 100, 101
CPU Features ..................................................................... 99
 2004 Microchip Technology Inc.
Preliminary
DS41203B-page 165