PIC16F688 Datasheet, PDF (107/174 Pages) Microchip Technology – 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F688
11.4.6 TIME-OUT SEQUENCE
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit erased (PWRT disabled), there will be
no time-out at all. Figure 11.4, Figure 11-5 and
Figure 11-6 depict time-out sequences. The device can
execute code from the INTOSC while OST is active by
enabling Two-Speed Start-up or Fail-Safe Monitor (see
Section 3.6.2 “Two-Speed Start-up Sequence” and
Section 3.7 “Fail-Safe Clock Monitor”).
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 11-5). This is useful for testing purposes or
to synchronize more than one PIC16F688 device
operating in parallel.
Table 11-5 shows the Reset conditions for some
special registers, while Table 11-4 shows the Reset
conditions for all the registers.
11.4.7 POWER CONTROL (PCON)
REGISTER
The Power Control (PCON) register (address 8Eh) has
two status bits to indicate what type of Reset that last
occurred.
Bit 0 is BOD (Brown-out). BOD is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent Resets to see if BOD = 0, indicating that
a Brown-out has occurred. The BOD status bit is a
“don’t care” and is not necessarily predictable if the
brown-out circuit is disabled (BODEN<1:0> = 00 in the
Configuration Word register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., VDD may have
gone too low).
For more information, see Section 4.2.3 “Ultra Low-
Power Wake-up” and Section 11.4.4 “Brown-Out
Detect (BOD)”.
TABLE 11-1: TIME-OUT IN VARIOUS SITUATIONS
Oscillator Configuration
Power-up
PWRTE = 0 PWRTE = 1
XT, HS, LP
RC, EC, INTOSC
TPWRT + 1024
• TOSC
TPWRT
1024 • TOSC
—
Brown-out Detect
PWRTE = 0
TPWRT + 1024
• TOSC
TPWRT
PWRTE = 1
1024 • TOSC
—
Wake-up
from Sleep
1024 • TOSC
—
TABLE 11-2: PCON BITS AND THEIR SIGNIFICANCE
POR
BOD
TO
PD
Condition
0
u
1
1
Power-on Reset
1
0
1
1
Brown-out Detect
u
u
0
u
WDT Reset
u
u
0
0
WDT Wake-up
u
u
u
u
MCLR Reset during normal operation
u
u
1
0
MCLR Reset during Sleep
Legend: u = unchanged, x = unknown
TABLE 11-3: SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Address Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOD
Value on
all other
Resets⁽¹⁾
03h
STATUS IRP RP1 RPO
TO
PD
Z
DC
C 0001 1xxx 000q quuu
8Eh
PCON
—
— ULPWUE SBODEN —
—
POR BOD --01 --qq --0u --uu
Legend:
Note 1:
u = unchanged, x = unknown, — = unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are
not used by BOD.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
 2004 Microchip Technology Inc.
Preliminary
DS41203B-page 105