PIC18F2455_07 Datasheet, PDF (382/430 Pages) Microchip Technology – 28/40/44-Pin, High Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
28.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 28-5:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 28-8: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾
DC
Oscillator Frequency⁽¹⁾
0.2
48
MHz EC, ECIO Oscillator mode
1
MHz XT, XTPLL Oscillator mode
4
25
MHz HS Oscillator mode
4
25
MHz HSPLL Oscillator mode
1
TOSC
External CLKI Period⁽¹⁾
20.8
—
ns EC, ECIO Oscillator mode
Oscillator Period⁽¹⁾
1000
5000
ns XT Oscillator mode
40
250
ns HS Oscillator mode
40
250
ns HSPLL Oscillator mode
2
TCY
Instruction Cycle Time⁽¹⁾
83.3
—
ns TCY = 4/FOSC
3
TosL, External Clock in (OSC1)
30
TosH
High or Low Time
10
—
ns XT Oscillator mode
—
ns HS Oscillator mode
4
TosR, External Clock in (OSC1)
—
20
ns XT Oscillator mode
TosF
Rise or Fall Time
—
7.5
ns HS Oscillator mode
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
DS39632D-page 380
Preliminary
© 2007 Microchip Technology Inc.