PIC18F2455_07 Datasheet, PDF (18/430 Pages) Microchip Technology – 28/40/44-Pin, High Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 1-3: PIC18F4455/4550 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
1 18 18
Master Clear (input) or programming voltage (input).
I ST Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I ST Digital input.
OSC1/CLKI
OSC1
CLKI
13 32 30
Oscillator crystal or external clock input.
I Analog Oscillator crystal input or external clock source input.
I Analog External clock source input. Always associated with
pin function OSC1. (See OSC2/CLKO pin.)
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14 33 31
Oscillator crystal or clock output.
O—
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
O—
In RC mode, OSC2 pin outputs CLKO which has 1/4
the frequency of OSC1 and denotes the instruction
cycle rate.
I/O TTL General purpose I/O pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
2: Default assignment for CCP2 when CCP2MX Configuration bit is set.
3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
DS39632D-page 16
Preliminary
© 2007 Microchip Technology Inc.