PIC18F2455_07 Datasheet, PDF (195/430 Pages) Microchip Technology – 28/40/44-Pin, High Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
19.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
19.1 Master SSP (MSSP) Module
Overview
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I²C™)
- Full Master mode
- Slave mode (with general address call)
The I²C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
19.2 Control Registers
The MSSP module has three associated control regis-
ters. These include a status register (SSPSTAT) and
two control registers (SSPCON1 and SSPCON2). The
use of these registers and their individual Configuration
bits differ significantly depending on whether the MSSP
module is operated in SPI or I²C mode.
Additional details are provided under the individual
sections.
19.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of the SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC7/RX/DT/SDO
• Serial Data In (SDI) – RB0/AN12/INT0/FLT0/SDI/SDA
• Serial Clock (SCK) – RB1/AN10/INT1/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/SS/HLVDIN/C2OUT
Figure 19-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 19-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Read
Internal
Data Bus
Write
SSPBUF reg
SDI
SDO
SSPSR reg
bit0
Shift
Clock
SS Control
Enable
SS
Edge
Select
2
Clock Select
SCK
SSPM3:SSPM0
SMP:CKE
2
4
Edge
( ) TMR2 Output
2
Select
Prescaler TOSC
4, 16, 64
Data to TX/RX in SSPSR
TRIS bit
Note:
Only those pin functions relevant to SPI
operation are shown here.
© 2007 Microchip Technology Inc.
Preliminary
DS39632D-page 193