PIC18F2455_07 Datasheet, PDF (238/430 Pages) Microchip Technology – 28/40/44-Pin, High Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 19-4: REGISTERS ASSOCIATED WITH I²C™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
51
PIR1
SPPIF⁽¹⁾ ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
54
PIE1
SPPIE⁽¹⁾ ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 54
IPR1
SPPIP⁽¹⁾ ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP 54
PIR2
OSCFIF CMIF
USBIF
EEIF
BCLIF HLVDIF TMR3IF CCP2IF 54
PIE2
OSCFIE CMIE
USBIE
EEIE
BCLIE HLVDIE TMR3IE CCP2IE
54
IPR2
OSCFIP CMIP
USBIP
EEIP
BCLIP HLVDIP TMR3IP CCP2IP
54
TRISC
TRISC7 TRISC6
—
—
—
TRISC2 TRISC1 TRISC0
54
TRISD⁽¹⁾ TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
54
SSPBUF MSSP Receive Buffer/Transmit Register
52
SSPADD MSSP Address Register in I²C Slave mode.
52
MSSP Baud Rate Reload Register in I²C Master mode.
TMR2 Timer2 Register
52
PR2
Timer2 Period Register
52
SSPCON1 WCOL SSPOV SSPEN
CKP
SSPM3 SSPM2 SSPM1 SSPM0
52
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN
PEN
RSEN
SEN
52
SSPSTAT SMP
CKE
D/A
P
S
R/W
UA
BF
52
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP in I²C™ mode.
Note 1: These registers or bits are not implemented in 28-pin devices.
DS39632D-page 236
Preliminary
© 2007 Microchip Technology Inc.