PIC18F2455_07 Datasheet, PDF (124/430 Pages) Microchip Technology – 28/40/44-Pin, High Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 10-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
PORTD⁽³⁾
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
54
LATD⁽³⁾
LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0
54
TRISD⁽³⁾
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 54
PORTE
RDPU⁽³⁾
—
—
—
RE3^(1,2) RE2⁽³⁾
RE1⁽³⁾
RE0⁽³⁾
54
CCP1CON P1M1⁽³⁾ P1M0⁽³⁾ DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 53
SPPCON⁽³⁾
—
—
—
—
—
— SPPOWN SPPEN 55
Legend:
Note 1:
2:
3:
— = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0).
RE3 is the only PORTE bit implemented on both 28-pin and 40/44-pin devices. All other bits are
implemented only when PORTE is implemented (i.e., 40/44-pin devices).
These registers and/or bits are unimplemented on 28-pin devices.
DS39632D-page 122
Preliminary
© 2007 Microchip Technology Inc.