PIC18LF2XK22 Datasheet, PDF (35/42 Pages) Microchip Technology – Flash Memory Programming Specification

5.3 Single-Supply ICSP Programming
The LVP bit in Configuration register, CONFIG4L,
enables Single-Supply (Low-Voltage) ICSP
Programming. The LVP bit defaults to a ‘1’ (enabled)
from the factory.
If Single-Supply Programming mode is not used, the
LVP bit can be programmed to a ‘0’. However, the LVP
bit may only be programmed by entering the High-
Voltage ICSP mode, where MCLR/VPP/RE3 is raised
to VIHH. Once the LVP bit is programmed to a ‘0’, only
the High-Voltage ICSP mode is available and only the
High-Voltage ICSP mode can be used to program the
device.
Note 1: The High-Voltage ICSP mode is always
available, regardless of the state of the
LVP bit, by applying VIHH to the MCLR/
VPP/RE3 pin.
5.4 Embedding Configuration Word
Information in the HEX File
To allow portability of code, a PIC18(L)F2XK22/4XK22
programmer is required to read the Configuration Word
locations from the hex file. If Configuration Word
information is not present in the hex file, then a simple
warning message should be issued. Similarly, while
saving a hex file, all Configuration Word information
must be included. An option to not include the
Configuration Word information may be provided.
When embedding Configuration Word information in
the hex file, it should start at address 300000h.
Microchip Technology Inc. feels strongly that this
feature is important for the benefit of the end customer.
PIC18(L)F2XK22/4XK22
5.5 Embedding Data EEPROM
Information In the HEX File
To allow portability of code, a PIC18(L)F2XK22/4XK22
programmer is required to read the data EEPROM
information from the hex file. If data EEPROM informa-
tion is not present, a simple warning message should
be issued. Similarly, when saving a hex file, all data
EEPROM information must be included. An option to
not include the data EEPROM information may be pro-
vided. When embedding data EEPROM information in
the hex file, it should start at address F00000h.
Microchip Technology Inc. believes that this feature is
important for the benefit of the end customer.
5.6 Checksum Computation
The checksum is calculated by summing the following:
• The contents of all code memory locations
• The Configuration Word, appropriately masked
• ID locations (Only if any portion of program
memory is code-protected)
The Least Significant 16 bits of this sum are the
checksum.
Code protection limits access to program memory by
both external programmer (code-protect) and code
execution (table read protect). The ID locations, when
included in a code protected checksum, contain the
checksum of an unprotected part. The unprotected
checksum is distributed: one nibble per ID location.
Each nibble is right justified.
Table 5-4 describes how to calculate the checksum for
each device.
Note:
The checksum calculation differs
depending on the code-protect setting.
Since the code memory locations read out
differently depending on the code-protect
setting, the table describes how to
manipulate the actual code memory
values to simulate the values that would
be read from a protected device. When
calculating a checksum by reading a
device, the entire code memory can
simply be read and summed. The
Configuration Word and ID locations can
always be read.
 2010 Microchip Technology Inc.
Advance Information
DS41398B-page 35