PIC18LF2XK22 Datasheet, PDF(15/42 Page) Microchip Technology – Flash Memory Programming Specification

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PIC18LF2XK22 Datasheet, PDF (15/42 Pages) Microchip Technology – Flash Memory Programming Specification

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PIC18(L)F2XK22/4XK22

TABLE 3-3: ERASE CODE MEMORY CODE SEQUENCE

4-bit

Command

Data Payload

Core Instruction

Step 1: Direct access to code memory and enable writes.

0000

8E A6

BSF

9C A6

BCF

84 A6

BSF

Step 2: Point to first row in code memory.

EECON1, EEPGD

EECON1, CFGS

EECON1, WREN

0000

6A F8

6A F7

6A F6

CLRF

Step 3: Enable erase and erase single row.

TBLPTRU

TBLPTRH

TBLPTRL

0000

88 A6

82 A6

00 00

BSF EECON1, FREE

BSF EECON1, WR

NOP

NOP Erase starts on the 4th clock of this instruction

Step 4: Poll WR bit. Repeat until bit is clear.

0000

0010

50 A6

6E F5

00 00

MOVF EECON1, W, 0

MOVWF TABLAT

NOP

Shift out data(1)

Step 5: Hold PGC low for time P10.

Step 6: Repeat step 3 with Address Pointer incremented by 64 until all rows are erased.

Step 7: Disable writes.

0000

94 A6

BCF EECON1, WREN

Note 1: See Figure 4-4 for details on shift out data timing.

ï£ 2010 Microchip Technology Inc.

Advance Information

DS41398B-page 15

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