PIC18LF2XK22 Datasheet, PDF (34/42 Pages) Microchip Technology – Flash Memory Programming Specification

PIC18(L)F2XK22/4XK22
TABLE 5-3:
Bit Name
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
REV<4:0>
.
PIC18(L)F2XK22/4XK22 BIT DESCRIPTIONS (CONTINUED)
Configuration
Words
Description
CONFIG7L Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
CONFIG7L Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
CONFIG7L Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
CONFIG7L Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
CONFIG7H Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
DEVID2 Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to
identify part number.
DEVID1 Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to
identify part number.
DEVID1 Revision ID bits
These bits are used to indicate the revision of the device.
DS41398B-page 34
Advance Information
 2010 Microchip Technology Inc.