PIC18LF2XK22 Datasheet, PDF (33/42 Pages) Microchip Technology – Flash Memory Programming Specification

PIC18(L)F2XK22/4XK22
TABLE 5-3:
Bit Name
CP3
CP2
CP1
CP0
CPD
CPB
WRT3
WRT2
WRT1
WRT0
WRTD
WRTB
WRTC
.
PIC18(L)F2XK22/4XK22 BIT DESCRIPTIONS (CONTINUED)
Configuration
Words
Description
CONFIG5L Code Protection bits (Block 3 code memory area)
1 = Block 3 is not code-protected
0 = Block 3 is code-protected
CONFIG5L Code Protection bits (Block 2 code memory area)
1 = Block 2 is not code-protected
0 = Block 2 is code-protected
CONFIG5L Code Protection bits (Block 1 code memory area)
1 = Block 1 is not code-protected
0 = Block 1 is code-protected
CONFIG5L Code Protection bits (Block 0 code memory area)
1 = Block 0 is not code-protected
0 = Block 0 is code-protected
CONFIG5H Code Protection bits (Data EEPROM)
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
CONFIG5H Code Protection bits (Boot Block memory area)
1 = Boot Block is not code-protected
0 = Boot Block is code-protected
CONFIG6L
Write Protection bits (Block 3 code memory area)
1 = Block 3 is not write-protected
0 = Block 3 is write-protected
CONFIG6L Write Protection bits (Block 2 code memory area)
1 = Block 2 is not write-protected
0 = Block 2 is write-protected
CONFIG6L Write Protection bits (Block 1 code memory area)
1 = Block 1 is not write-protected
0 = Block 1 is write-protected
CONFIG6L Write Protection bits (Block 0 code memory area)
1 = Block 0 is not write-protected
0 = Block 0 is write-protected
CONFIG6H Write Protection bit (Data EEPROM)
1 = Data EEPROM is not write-protected
0 = Data EEPROM is write-protected
CONFIG6H
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
CONFIG6H Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
 2010 Microchip Technology Inc.
Advance Information
DS41398B-page 33