PIC18LF2XK22 Datasheet, PDF (11/42 Pages) Microchip Technology – Flash Memory Programming Specification

PIC18(L)F2XK22/4XK22
2.6 Entering and Exiting Low-Voltage
ICSP Program/Verify Mode
Low-voltage entry into ICSP modes for
PIC18(L)F2XK22/4XK22 devices is somewhat different
than previous PIC18 devices. As shown in Figure 2-14,
entering ICSP Program/Verify mode requires three
steps:
1. Voltage is briefly applied to the MCLR pin.
2. A 32-bit key sequence is presented on PGD.
3. Voltage is reapplied to MCLR.
The programming voltage applied to MCLR is VIH, or
usually, VDD. There is no minimum time requirement for
holding at VIH. After VIH is removed, an interval of at
least P18 must elapse before presenting the key
sequence on PGD.
The key sequence is a specific 32-bit pattern,
‘0100 1101 0100 0011 0100 1000 0101 0000’
(more easily remembered as 4D434850h in hexa-
decimal). The device will enter Program/Verify mode
only if the sequence is valid. The Most Significant bit of
the most significant nibble must be shifted in first.
Once the key sequence is complete, VIH must be
applied to MCLR and held at that level for as long as
Program/Verify mode is to be maintained. An interval of
at least time P20 and P15 must elapse before present-
ing data on PGD. Signals appearing on PGD before
P15 has elapsed may not be interpreted as valid.
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
the Program/Verify mode, all unused I/Os are placed in
the high-impedance state.
Exiting Program/Verify mode is done by removing VIH
from MCLR, as shown in Figure 2-15. The only
requirement for exit is that an interval, P16, should
elapse between the last clock and the program signals
on PGC and PGD before removing VIH.
When VIH is reapplied to MCLR, the device will enter
the ordinary operational mode and begin executing the
application instructions.
FIGURE 2-14:
MCLR
ENTERING LOW-VOLTAGE PROGRAM/VERIFY MODE
P13
VIH
VIH
P20 P15
VDD
PGD
PGC
Program/Verify Entry Code = 4D434850h
0 1 0 0 1 ... 0 0 0 0
b31 b30 b29 b28 b27
b3 b2 b1 b0
P18
P2B
P2A
FIGURE 2-15:
MCLR
EXITING LOW-VOLTAGE
PROGRAM/VERIFY MODE
P16
VIH
VDD
PGD
PGC
VIH
PGD = Input
 2010 Microchip Technology Inc.
Advance Information
DS41398B-page 11