PIC18LF2X_13 Datasheet, PDF (312/560 Pages) Microchip Technology – PIC18(L)F2X/45K50 USB Flash MCU Product Brief

PIC18(L)F2X/4XK22
FIGURE 18-2: COMPARATOR C1/C2 SIMPLIFIED BLOCK DIAGRAM
CxCH<1:0>
2
C12IN0-
0
C12IN1-
1
C12IN2-
2
C12IN3-
3
CxON⁽¹⁾
CxSP
CxVIN-
CxVIN+
-
Cx
+
CxR
CxIN+
0
DAC Output
0
FVR BUF1 ₁
1
CXVREF
CXRSEL
CxPOL
Timer1 Clock
Q1^(2),(3)
DQ
EN
To CMxCON0 (CxOUT)
CM2CON1 (MCxOUT)
Q3⁽²⁾
Read or Write
of CMxCON0
DQ
EN
CL
Reset
CxSYNC
0
DQ 1
CxOE
To Interrupts
(CxIF)
async_CXOUT
to PWM Logic
TRIS bit
CxOUT
sync_CxOUT
- to SR Latch
- to TxG MUX⁽⁴⁾
Note 1:
2:
3:
4:
When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (FOSC).
Q1 is held high during Sleep mode.
Synchronized comparator output should not be used to gate Timer1 in conjunction with synchronized T1CKI.
DS41412F-page 312
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