PIC18LF2X_13 Datasheet, PDF (147/560 Pages) Microchip Technology – PIC18(L)F2X/45K50 USB Flash MCU Product Brief

PIC18(L)F2X/4XK22
TABLE 10-9: REGISTERS ASSOCIATED WITH PORTC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELC
ANSC7 ANSC6
ANSC5
ANSC4
ANSC3
ANSC2
—
—
155
ECCP1AS CCP1ASE
CCP1AS<2:0>
PSS1AC<1:0>
PSS1BD<1:0>
209
CCP1CON
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
205
ECCP2AS CCP2ASE
CCP2AS<2:0>
PSS2AC<1:0>
PSS2BD<1:0>
209
CCP2CON
P2M<1:0>
DC2B<1:0>
CCP2M<3:0>
205
CTMUCONH CTMUEN
—
CTMUSIDL TGEN
EDGEN
EDGSEQEN IDISSEN CTTRIG 333
LATC
LATC7 LATC6
LATC5
LATC4
LATC3
LATC2
LATC1 LATC0
157
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
153
RCSTA1
SLRCON
SPEN
RX9
—
—
SREN
—
CREN
SLRE⁽¹⁾
ADDEN
SLRD⁽¹⁾
FERR
SLRC
OERR RX9D
278
SLRB SLRA
158
SSP1CON1
WCOL SSPOV
SSPEN
CKP
SSPM<3:0>
260
T1CON
TMR1CS<1:0>
T1CKPS<1:0>
T1SOSCEN T1SYNC T1RD16 TMR1ON 172
T3CON
TMR3CS<1:0>
T3CKPS<1:0>
T3SOSCEN T3SYNC T3RD16 TMR3ON 172
T3GCON
TMR3GE T3GPOL T3GTM T3GSPM T3GGO/DONE T3GVAL
T3GSS<1:0>
173
T5CON
TMR5CS<1:0>
T5CKPS<1:0>
T5SOSCEN T5SYNC T5RD16 TMR5ON 172
TRISC
TRISC7 TRISC6 TRISC5 TRISC4
TRISC3
TRISC2 TRISC1 TRISC0 156
TXSTA1
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT TX9D
277
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTC.
Note 1: Available on PIC18(L)F4XK22 devices.
TABLE 10-10: CONFIGURATION REGISTERS ASSOCIATED WITH PORTC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
CONFIG3H MCLRE
—
P2BMX
T3CMX
HFOFST CCP3MX PBADEN
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTC.
Bit 0
CCP2MX
Register
on Page
360
 2010-2012 Microchip Technology Inc.
DS41412F-page 147