PIC16F1829LIN Datasheet, PDF (43/74 Pages) Micon Design Technology Corporation – 20-Pin, 8-bit Flash LIN/J2602 Microcontroller

PIC16F1829LIN
REGISTER 5-7: WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
U-0
U-0
WPUB7
WPUB6
WPUB5
WPUB4
—
—
bit 7
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
WPUB<7:4>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is configured as an output.
REGISTER 5-8: INLVLB: PORTB INPUT LEVEL CONTROL REGISTER
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
U-0
U-0
U-0
INLVLB7
INLVLB6 INLVLB5 INLVLB4
—
—
—
bit 7
U-0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
INLVLB<7:4>: PORTB Input Level Select bits
For RB<7:4> pins, respectively
1 = ST input used for PORT reads and Interrupt-on-Change
0 = TTL input used for PORT reads and Interrupt-on-Change
Unimplemented: Read as ‘0’
TABLE 5-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELB
INLVLB
LATB
PORTB
TRISB
WPUB
Legend:
ANSB74 ANSB6 ANSB5 ANSB4
—
—
—
—
42
INLVLB7 INLVLB6 INLVLB5 INLVLB4
—
—
—
—
43
LATB7
LATB6
LATB5
LATB4
—
—
—
—
42
LINTX
LINCS
LINRX
RB4
—
—
—
—
41
TRISB7 TRISB6 TRISB5 TRISB4
—
—
—
—
41
WPUB7 WPUB6 WPUB5 WPUB4
—
—
—
—
43
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
 2012 Microchip Technology Inc.
Preliminary
DS41673A-page 43