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PIC16F1829LIN Datasheet, PDF (31/74 Pages) Micon Design Technology Corporation – 20-Pin, 8-bit Flash LIN/J2602 Microcontroller
PIC16F1829LIN
TABLE 4-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 4
200h(1) INDF0
201h(1) INDF1
202h(1)
203h(1)
204h(1)
205h(1)
206h(1)
207h(1)
208h(1)
209h(1)
20Ah(1)
20Bh(1)
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
DC
INTF
C
IOCIF
20Ch
20Dh(2)
20Eh(2)
WPUA
WPUB
WPUC
—
WPUB7
WPUC7
—
WPUB6
WPUC6
WPUA5
WPUB5
WPUC5
WPUA4
WPUB4
WPUC4
WPUA3
—
WPUC3
WPUA2
—
WPUC2
WPUA1
—
WPUC1
WPUA0
—
WPUC0
20Fh
—
Unimplemented
210h
—
Unimplemented
211h(2) SSP1BUF
Don’t care
212h(2) SSP1ADD
Don’t care
213h(2) SSP1MSK
Don’t care
214h(2) SSP1STAT
0
0
0
0
0
0
0
0
215h(2) SSP1CON1
0
0
0
0
0000
216h(2) SSP1CON2
0
0
0
0
0
0
0
0
217h(2) SSP1CON3
0
0
0
0
0
0
0
0
218h
—
Unimplemented
219h(2) SSP2BUF
Don’t care
21Ah(2) SSP2ADD
Don’t care
21Bh(2) SSP2MSK
Don’t care
21Ch(2) SSP2STAT
0
0
0
0
0
0
0
0
21Dh(2) SSP2CON1
0
0
0
0
0000
21Eh(2) SSP2CON2
0
0
0
0
0
0
0
0
21Fh(2) SSP2CON3
0
0
0
0
0
0
0
0
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
Registers in bold have functional differences. Please refer to the appropriate chapters in the data sheet for details.
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
--11 1111 --11 1111
1111 ---- 1111 ----
1111 1111 1111 1111
—
—
—
—
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
—
—
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
 2012 Microchip Technology Inc.
Preliminary
DS41673A-page 31