PIC16F1829LIN Datasheet, PDF (37/74 Pages) Micon Design Technology Corporation – 20-Pin, 8-bit Flash LIN/J2602 Microcontroller

PIC16F1829LIN
TABLE 4-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 31
F80h⁽¹⁾ INDF0
F81h⁽¹⁾ INDF1
F82h⁽¹⁾
F83h⁽¹⁾
F84h⁽¹⁾
F85h⁽¹⁾
F86h⁽¹⁾
F87h⁽¹⁾
F88h⁽¹⁾
F89h⁽¹⁾
F8Ah⁽¹⁾
F8Bh⁽¹⁾
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
DC
INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
F8Ch
—
FE3h
—
Unimplemented
—
—
FE4h STATUS_
—
—
—
—
—
Z_SHAD DC_SHAD C_SHAD ---- -xxx ---- -uuu
SHAD
FE5h
WREG_
SHAD
Working Register Shadow
0000 0000 uuuu uuuu
FE6h
BSR_
SHAD
—
—
—
Bank Select Register Shadow
---x xxxx ---u uuuu
FE7h
PCLATH_
SHAD
—
Program Counter Latch High Register Shadow
-xxx xxxx uuuu uuuu
FE8h
FSR0L_
SHAD
Indirect Data Memory Address 0 Low Pointer Shadow
xxxx xxxx uuuu uuuu
FE9h
FSR0H_
SHAD
Indirect Data Memory Address 0 High Pointer Shadow
xxxx xxxx uuuu uuuu
FEAh
FSR1L_
SHAD
Indirect Data Memory Address 1 Low Pointer Shadow
xxxx xxxx uuuu uuuu
FEBh
FSR1H_
SHAD
Indirect Data Memory Address 1 High Pointer Shadow
xxxx xxxx uuuu uuuu
FECh
—
Unimplemented
—
—
FEDh _STKPTR
—
—
—
Current Stack pointer
---1 1111 ---1 1111
FEEh _TOSL
Top-of-Stack Low byte
xxxx xxxx uuuu uuuu
FEFh _TOSH
—
Top-of-Stack High byte
-xxx xxxx -uuu uuuu
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
Registers in bold have functional differences. Please refer to the appropriate chapters in the data sheet for details.
 2012 Microchip Technology Inc.
Preliminary
DS41673A-page 37