MAX11253 Datasheet, PDF (45/51 Pages) Maxim Integrated Products – Longer Battery Life for Portable Applications

MAX11253
16-Bit, 6-Channel, 64ksps, 6.2nV/√Hz PGA,
Delta-Sigma ADC with SPI Interface
CHMAP1: Channel Map Register (Read/Write)
BIT NAME
DEFAULT
BIT NAME
DEFAULT
BIT NAME
DEFAULT
Default = 0x00_0000
CH5_GPO1
0
CH4_GPO1
0
CH3_GPO1
0
CH5_GPO0
0
CH4_GPO0
0
CH3_GPO0
0
CH5_ORD2
0
CH4_ORD2
0
CH3_ORD2
0
CH5_ORD1
0
CH4_ORD1
0
CH3_ORD1
0
CH5_ORD0
0
CH4_ORD0
0
CH3_ORD0
0
CH5_EN
0
CH4_EN
0
CH3_EN
0
CH5_GPOEN
0
CH4_GPOEN
0
CH3_GPOEN
0
CHMAP0: Channel Map Register (Read/Write)
BIT NAME
DEFAULT
BIT NAME
DEFAULT
BIT NAME
DEFAULT
Default = 0x00_0000
CH2_GPO1
0
CH1_GPO1
0
CH0_GPO1
0
CH2_GPO0
0
CH1_GPO0
0
CH0_GPO0
0
CH2_ORD2
0
CH1_ORD2
0
CH0_ORD2
0
CH2_ORD1
0
CH1_ORD1
0
CH0_ORD1
0
CH2_ORD0
0
CH1_ORD0
0
CH0_ORD0
0
CH2_EN
0
CH1_EN
0
CH0_EN
0
CH2_GPOEN
0
CH1_GPOEN
0
CH0_GPOEN
0
These registers are used to enable channels for scan, enable GPO/GPIO pins for scan, program the channel scan order, and pair
the GPO/GPIO pins with its associated channel. These registers cannot be written during an active conversion.
BIT NAME
CHX_GPO[1:0]
CHX_ORD[2:0]
DESCRIPTION
Used to map which GPO or GPIO pin is activated when this channel is selected. The STAT:GPOERR
flag is set if more than one input channel is mapped to the same GPO/GPIO pin. The decoding is as
follows:
CHX_GPO1 CHX_GPO0
DESCRIPTION
0
0
GPO0
0
1
GPO1
1
0
GPIO0
1
1
GPIO1
Defines the order during scan when the channel is enabled. The CHX_ORD[2:0] values of ‘000’ and ‘111’
are not allowed for the order of an enabled channel. The allowable orders are ‘001’, ‘010’, ‘011’, ‘100’,
‘101’, ‘110’ representing first, second, third channel to be scanned, and so on. The value of ‘000’ is a
default value and the value of ‘111’ is greater than the number of scannable channels. A value greater
than the number of enabled channels is invalid and will set an error condition at STAT:ORDERR. Setting
a channel’s order to ‘000’ or ‘111’ and enabling it will set the STAT:ORDERR flag in the STAT register.
If sequencer mode 3 is selected, and more channels are enabled for sequencing than available GPO/
GPIO pins, then the sequence order of the channels for which a GPO/GPIO pin is enabled must be
lower than for the channels which do not have a GPO/GPIO pin mapped to them.
CHX_EN
CHX_GPOEN
Set this bit to ‘1’ to enable scanning of this channel. Set this bit to ‘0’ to disable scanning of this channel.
Used to enable activation of the GPO/GPIO pins when this channel is selected during scan. Set this bit
to ‘1’ to enable. Set this bit to ‘0’ to disable.
www.maximintegrated.com
Maxim Integrated │  45