MAX11253 Datasheet, PDF (12/51 Pages) Maxim Integrated Products – Longer Battery Life for Portable Applications

MAX11253
Pin Configuration
16-Bit, 6-Channel, 64ksps, 6.2nV/√Hz PGA,
Delta-Sigma ADC with SPI Interface
+
RDYB 1
SCLK 2
AVDD 3
AVSS 4
REFP 5
REFN 6
AIN0N 7
AIN0P 8
MAX11253
24 GPO0
23 GPIO0/CLK
22 GPO1
21 GPOGND
20 CAPP
19 CAPN
18 AIN5P
EP 17 AIN5N
Pin Description
PIN
NAME
1
RDYB
2
SCLK
3
AVDD
4
AVSS
5
REFP
6
REFN
7
AIN0N
8
AIN0P
9
AIN1N
10
AIN1P
FUNCTION
Active-Low Data Ready Output. RDYB goes low when a new conversion result is available in the
data register. When a read operation of a full output word completes, RDYB returns high. RDYB is
always driven.
SPI Serial Clock Input
Positive Analog Supply
Negative Analog Supply
Positive Reference Input
Negative Reference Input
Negative Analog Input 0
Positive Analog Input 0
Negative Analog Input 1
Positive Analog Input 1
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