MAX11253 Datasheet, PDF (41/51 Pages) Maxim Integrated Products – Longer Battery Life for Portable Applications

MAX11253
16-Bit, 6-Channel, 64ksps, 6.2nV/√Hz PGA,
Delta-Sigma ADC with SPI Interface
CTRL1: Control Register 1 (Read/Write)
Default = 0x02l
BIT NAME
CAL1
CAL0
PD1
PD0
U/B
FORMAT SCYCLE CONTSC
DEFAULT
0
0
0
0
0
0
1
0
This register controls the selection of operational modes and configurations.
BIT NAME
CAL[1:0]
PD[1:0]
U/B
FORMAT
SCYCLE
CONTSC
DESCRIPTION
The calibration bits control the type of calibration performed when a calibration command byte is issued:
CAL1 CAL0
DESCRIPTION
0
0 Performs a self-calibration
0
1 Performs a system-level offset calibration
1
0 Performs a system-level full-scale calibration
1
1 Reserved. Do not use.
Selects the power-down state to be executed. The MAX11253 enters the selected power-down state
after a conversion command with MODE[1:0] set to ‘01’ is written. The state is decoded as below:
PD1 PD0
DESCRIPTION
0
0 NOP (default)
0
1 SLEEP
1
0 STANDBY
1
1 RESET
The ‘unipolar/bipolar’ bit controls the input range. A ‘1’ selects unipolar input range and a ‘0’ selects
bipolar input range.
The ‘format’ bit controls the digital format of the bipolar range data. A ‘0’ selects two’s complement and
a ‘1’ selects offset binary format of the bipolar range. The data for unipolar range is always formatted
in offset binary format.
The ‘single-cycle’ bit selects either no-latency single conversion mode or continuous conversion in
sequencer mode 1. A ‘1’ selects single-cycle mode where a no-latency conversion is followed by a
power-down to SLEEP mode. A ‘0’ selects continuous conversion mode with a latency of 5 conversion
cycles for filtering. The RDYB pin goes low when valid/settled data is available. Only SCYCLE = ‘1’ is
valid in sequencer mode 2 and 3.
The ‘continuous single-cycle’ bit selects between single or continuous conversions while operating
in single-cycle mode in sequencer mode 1. A ‘1’ selects continuous conversions and a ‘0’ selects a
single conversion.
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