LTC3876_15 Datasheet, PDF (40/48 Pages) Linear Technology – Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and 50mA VTT Reference

LTC3876
APPLICATIONS INFORMATION
V_IN
4.5V TO 14V
C_IN1
180μF
w2
C_IN2
10μF
w3
5.9K
VDDQ
1.5V
20A
L1
MT1
0.47μH
C_OUT1
100μF
C_OUT2
330μF
w2
MB1
2.2Ω
1μF
0.1μF
0.1μF
LTC3876
V_IN
SENSE1^–
SENSE2^–
SENSE1⁺
SENSE2⁺
BOOST1
TG1
DB1
2.2Ω
1μF
SW1
4.7μF
DRV_CC1
INTV_CC
BG1
BOOST2
TG2
SW2
DRV_CC2
EXTV_CC
BG2
PGND
30.1k
100k
VDDQSNS
V_OUTSENSE1+
20k
V_{OUTSENSE1–}
PGOOD _PGOOD
0.01μF
VTTRVCC
VTTSNS
VTTR
120pF
TRACK/SS1
ITH1
ITH2
1500pF
12.7k
0.1μF
0.1μF
DB2
1Ω
1μF
2.2μF
470pF
4700pF
13.7k
100k
DTR1
V_RNG1
RT
SGND
RUN
CVCC
V_RNG2
PHASMD
MODE/PLLIN
CLKOUT
3876 F11a
2.74K
MT2
L1
0.47μH
MB2
C_OUT4
330μF
VTT
0.75V
±10A
C_OUT3
100μF
VTTR
±50mA
C_IN1: SANYO 16SVP180M
C_IN2: MURATA GRM32DR61E106KA12L
C_OUT2,C_OUT4: SANYO 2R5TPE330M9
C_OUT1, C_OUT3: MURATA GRM31CR60J107ME39L
DB1, DB2: CENTRAL SEMI CMDSH-3
L1: WÜRTH 7443330047
L2: WÜRTH 7443340047
MT1, MB2: INFINEON BSC0901NS
MB1: INFINEON BSC010NE2LS
MT2: INFINEON BSC050NE2LS
100
4.5
V_IN = 12V
V_DDQ = 1.5V
4.0
90
3.5
80 DISCONTINUOUS
3.0
MODE
2.5
70
2.0
60
50
40
0.1
1.5
1.0
FORCED
CONTINUOUS ^0.5
MODE
0
1
10
LOAD CURRENT (A)
3876 F11b
Figure 11. Design Example: 4.5V to 14V Input, VDDQ 1.5V/20A and VTT 0.75V/±10A Output,
400kHz, DCR, Step-Down Converter
• Keep small-signal components connected noise-sensi-
tive pins (give priority to SENSE⁺/SENSE^–, V_OUTSENSE1+/
V_{OUTSENSE1–}, V_FB2, RT, ITH, V_RNG pins) on the left hand
side of the IC as close to their respective pins as pos-
sible. This minimizes the possibility of noise coupling
40
into these pins. If the LTC3876 can be placed on the
bottom side of a multilayer board, use ground planes
to isolate from the major power components on the top
side of the board, and prevent noise coupling to noise
sensitive components on the bottom side.
3876f