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LTC3876_15 Datasheet, PDF (21/48 Pages) Linear Technology – Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and 50mA VTT Reference
LTC3876
APPLICATIONS INFORMATION
LTC3876
SENSE+
SENSE–
RF
CF RF
RSENSE RESISTOR
AND
PARASITIC INDUCTANCE
R ESL
CFt3F ≤ ESL/RS
POLE-ZERO
CANCELLATION
VOUT
3876 F03a
FILTER COMPONENTS
PLACED NEAR SENSE PINS
Figure 3a. RSENSE Current Sensing
TO SENSE FILTER,
NEXT TO THE CONTROLLER
RSENSE 3876 F03b
COUT
Figure 3b. Sense Lines Placement with Sense Resistor
RSENSE is chosen based on the required maximum output
current. Given the maximum current, IOUT(MAX), maximum
sense voltage, VSENSE(MAX), set by VRNG, and maximum
inductor ripple current ∆IL(MAX), the value of RSENSE can
be chosen as:
RSENSE
=
VSENSE(MAX )
IOUT(MAX )
–
ΔIL(MAX )
2
Conversely, given RSENSE and IOUT(MAX), VSENSE(MAX) and
thus VRNG voltage can be determined from the above equa-
tion. To ensure the maximum output current, sufficient
margin should be built in the calculations to account for
variations of LTC3876 under different operating conditions
and tolerances of external components.
Because of possible PCB noise in the current sensing
loop, the current sensing voltage ripple ∆VSENSE = ∆IL •
RSENSE also needs to be checked in the design to get a
good signal-to-noise ratio. In general, for a reasonably
good PCB layout, 10mV of ∆VSENSE is recommended as
a conservative number to start with, either for RSENSE or
inductor DCR sensing applications.
For today’s highest current density solutions the value
of the sense resistor can be less than 1mΩ and the
peak sense voltage can be as low as 20mV. In addition,
inductor ripple currents greater than 50% with operation
up to 2MHz are becoming more common. Under these
conditions, the voltage drop across the sense resistor’s
parasitic inductance becomes more relevant. A small RC
filter placed near the IC has been traditionally used to re-
duce the effects of capacitive and inductive noise coupled
in the sense traces on the PCB. A typical filter consists of
two series 10Ω resistors connected to a parallel 1000pF
capacitor, resulting in a time constant of 20ns.
This same RC filter, with minor modifications, can be
used to extract the resistive component of the current
sense signal in the presence of parasitic inductance.
For example, Figure 4a illustrates the voltage waveform
across a 2mΩ sense resistor with a 2010 footprint for a
1.2V/15A converter operating at 100% load. The waveform
is the superposition of a purely resistive component and a
purely inductive component. It was measured using two
scope probes and waveform math to obtain a differential
measurement. Based on additional measurements of the
inductor ripple current and the on-time and off-time of
the top switch, the value of the parasitic inductance was
determined to be 0.5nH using the equation:
ESL = VESL(STEP) • tON • tOFF
ΔIL
tON + tOFF
where VESL(STEP) is the voltage step caused by the ESL
and shown in Figure 4a, and tON and tOFF are top MOSFET
on-time and off-time respectively. If the RC time constant
is chosen to be close to the parasitic inductance divided by
the sense resistor (L/R), the resulting waveform looks re-
sistive again, as shown in Figure 4b. For applications using
low VSENSE(MAX), check the sense resistor manufacturer’s
data sheet for information about parasitic inductance. In
the absence of data, measure the voltage drop directly
across the sense resistor to extract the magnitude of the
ESL step and use the equation above to determine the ESL.
However, do not over filter. Keep the RC time constant less
than or equal to the inductor time constant to maintain a
high enough ripple voltage on VRSENSE.
3876f
21