LTC3876_15 Datasheet, PDF (12/48 Pages) Linear Technology – Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and 50mA VTT Reference

LTC3876
PIN FUNCTIONS (QFN/TSSOP)
BG1, BG2 (Pin 22, Pin 29/Pin 26, Pin 33): Bottom Gate
Driver Outputs. The BG pins drive the gates of the bottom
N-channel power MOSFET between PGND and DRV_CC.
DRV_CC1, DRV_CC2 (Pin 23, Pin 28/Pin 27, Pin 32): Sup-
plies of Bottom Gate Drivers. DRV_CC1 is also the output
of an internal 5.3V regulator, DRV_CC2 is also the output
of the EXTV_CC switch. Normally the two DRV_CC pins are
shorted together on the PCB, and decoupled to PGND with
a minimum of 4.7μF ceramic capacitor, C_DRVCC.
V_IN (Pin 24/Pin 28): Input Voltage Supply. The supply
voltage can range from 4.5V to 38V. For increased noise
immunity decouple this pin to SGND with an RC filter.
Voltage at this pin is also used to adjust top gate on-time,
therefore it is recommended to tie this pin to the main
power input supply through an RC filter.
PGND (Pin 25, Exposed Pad Pin 39/Pin 29, Exposed
Pad Pin 39): Power Ground. Connect this pin as close
as practical to the source of the bottom N-channel power
MOSFET, the (–) terminal of C_DRVCC and the (–) terminal
of C_IN. Connect the exposed pad and PGND pin to SGND
pin using a single PCB trace under the IC. The exposed
pad must be soldered to the circuit board for electrical
and rated thermal performance.
INTV_CC (Pin 26/Pin 30): Supply Input for Internal Circuitry
(Not Including Gate Drivers). Normally powered from the
DRV_CC pins through a decoupling RC filter to SGND (typi-
cally 2.2Ω and 1μF)
EXTV_CC (Pin 27/Pin 31): External Power Input. When
EXTV_CC exceeds 4.7V, an internal switch connects this pin
to DRV_CC2 and shuts down the internal regulator so that
INTV_CC and gate-drive power is drawn from EXTV_CC. The
V_IN pin still needs to be powered up but draws minimum
current.
VTTSNS (Pin 33/Pin 37): VTT Sense, Channel 2 Error
Amplifier Feedback Input. Kelvin-connect this pin directly
to desired regulation point on the VTT supply, VTTSNS
provides the inverting regulation feedback signal for the
VTT termination supply. Internally the VTT error amplifier
positive input connects to the VTTR output for accurate
VTTR reference tracking. VTTSNS will regulate channel 2
VTT termination supply to the differential reference voltage
0.5 • (VDDQSNS – V_{OUTSENSE1–}).
PHASMD (Pin 38/Pin 4): Phase Selector Input. This pin
determines the relative phases of channels and the CLKOUT
signal. With zero phase being defined as the rising edge
of TG1: Pulling this pin to SGND locks TG2 to 180° and
CLKOUT to 60°, Connecting this pin to INTV_CC locks TG2
to 240° and CLKOUT to 120° and floating this pin locks
TG2 to 180° and CLKOUT to 90°.
CVCC (Pin 35/Pin 1): Connect V_CC. This pin should always
be connected to INTV_CC.
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