LTC3876_15 Datasheet, PDF (11/48 Pages) Linear Technology – Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and 50mA VTT Reference

LTC3876
PIN FUNCTIONS (QFN/TSSOP)
TRACK/SS1 (Pin 11/Pin 15): External Tracking and Soft-
Start Input for Channel 1 VDDQ . An internal 1μA temper-
ature-independent pull-up current source is connected
to the TRACK/SS1 pin. A capacitor to ground at this pin
sets the ramp time to the final regulated output voltage.
The LTC3876 regulates V_DFB1, the differential feedback
voltages (V_OUTSENSE1+ – V_{OUTSENSE1–}) to the smaller of
0.6V or the voltage on the TRACK/SS1 pin. Alternatively,
another voltage supply connected to this pin allows the
output to track the outer supply during start-up.
V_OUTSENSE1+ (Pin 12/Pin 16): VDDQ Differential Output
Sense Amplifier (+) Input of Channel 1. Connect this pin
to a feedback resistor divider between the positive and
negative output capacitor terminals of V_OUT1. In nominal
operation the LTC3876 will attempt to regulate the dif-
ferential output voltage V_OUT1 to 0.6V multiplied by the
feedback resistor divider ratio.
V_{OUTSENSE1–} (Pin 13/Pin 17): Differential Output Sense
Amplifier (–) Input of Channel 1. Connect this pin to the
negative terminal of the output load capacitor. This pin is
the remote ground connection for VDDQSNS which pro-
vides the input to the VTT reference (VTTR) resistor divider.
SENSE1⁺, SENSE2⁺ (Pin 14, Pin 37/Pin 18, Pin 3): Differ-
ential Current Comparator (+) Input. The ITH pin voltage and
controlled offsets between the SENSE⁺ and SENSE^– pins
set the current trip threshold. The comparator can be used
for R_SENSE sensing or inductor DCR sensing. For R_SENSE
sensing Kelvin (4-wire) connect the SENSE⁺ pin to the (+)
terminal of R_SENSE. For DCR sensing tie the SENSE⁺ pin
to the connection between the DCR sense capacitor and
sense resistor connected across the inductor.
SENSE1^–, SENSE2^– (Pin 15, Pin 36/Pin 19, Pin 2): Dif-
ferential Current Comparator(–) Input. The comparator
can be used for R_SENSE sensing or inductor DCR sens-
ing. For R_SENSE current sensing Kelvin (4-wire) connect
the SENSE^– pin to the (–) terminal of R_SENSE. For DCR
sensing tie the SENSE^– pin to the DCR sense capacitor
tied to the inductor V_OUT node connection. These pins
also function as output voltage sense pins for the top
MOSFET on-time adjustment. The impedance looking
into these pins is different from the SENSE⁺ pins because
there is an additional 500k internal resistor from each of
the SENSE^– pins to SGND.
DTR1 (Pin 16/Pin 20): Detect Load Transient Transient for
Overshoot Reduction. When load current suddenly drops,
if voltage on this DTR pin drops below half of INTV_CC,
the bottom gate (BG) will turn off and allow the inductor
current to drop to zero faster, thus reducing the V_OUT
overshoot. (Refer to Load-Release Transient Detection in
the Applications Information section for more details.) To
disable the DTR feature, simply tie the DTR pin to INTV_CC.
RUN (Pin 17/Pin 21): Run Control Input. An internal pro-
portional-to-absolute temperature (PTAT) pull-up current
source (~2.5μA at 25°) is constantly connected to this pin.
Taking RUN below a threshold (~0.8V at 25°) shuts down
all bias of INTV_CC and DRV_CC and places the LTC3876 into
micropower shutdown mode. Allowing the RUN pin to rise
above this threshold turns on the internal bias supply and
all circuitry while forcing TG and BG off. When the RUN
pin rises above 1.2V the TG and BG drivers are turned on
and an additional 10μA temperature-independent pull-up
current is connected internally to the RUN pin. The RUN
pin can sink up to 50μA or be forced as high as 6V.
PGOOD (Pin 18/Pin 22): Power Good Indicator Output.
This open-drain logic output is pulled to ground when
VDDQ goes out of a ±7.5% or VTT goes out of a ±10%
window around the regulation point, after a 50μs power-bad
masking delay. Returning to the regulation point, there is
a much shorted delay to power good, and a hysteresis of
around 15mV on both sides of the window.
BOOST1, BOOST2 (Pin 19, Pin 32/Pin 23, Pin 36): Boosted
Floating Driver Supply for Top MOSFET Drivers. The (+)
terminal of the bootstrap capacitor CB connects to this pin.
The BOOST pins swings between (DRV_CC – V_SCHOTTKY)
and (V_IN + DRV_CC – V_SCHOTTKY).
TG1, TG2 (Pin 20, Pin 31/Pin 24, Pin 35): Top Gate Driver
Outputs. The TG pins drive the gates of the top N-channel
power MOSFET with a voltage swing of DRV_CC between
SW and BOOST.
SW1, SW2 (Pin 21, Pin 30/Pin 25, Pin 34): Switch Node
Connection to Inductors. Voltage swings are from a di-
ode voltage below ground to V_IN. The (–) terminal of the
bootstrap capacitor, CB connects to this node.
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