LTC3730_15 Datasheet, PDF (3/28 Pages) Linear Technology – 3-Phase, 5-Bit Intel Mobile VID, 600kHz, Synchronous Buck Controller

LTC3730
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_CC = V_RUN/SS = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
I_Q
I_RUN/SS
V_RUN/SS
V_RUN/SSARM
Input DC Supply Current
Normal Mode
Shutdown
Soft-Start Charge Current
RUN/SS Pin ON Threshold
RUN/SS Pin Arming Threshold
(Note 4)
V_CC = 5V
V_RUN/SS = 0V, VID0 to VID4 Open
V_RUN/SS = 1.9V
V_RUN/SS, Ramping Positive
V_RUN/SS, Ramping Positive Until Short-Circuit
Latch-Off is Armed
2.3
3.5
mA
20
50
µA
–0.8 –1.5 –2.5
µA
1
1.5
1.9
V
3.8
4.5
V
V_RUN/SSLO RUN/SS Pin Latch-Off Threshold
V_RUN/SS, Ramping Negative
3.2
V
I_SCL
RUN/SS Discharge Current
Soft-Short Condition V_EAIN = 0.375V, V_RUN/SS = 4.5V
–5
– 1.5
µA
I_SDLHO
I_SENSE
Shutdown Latch Disable Current
SENSE Pins Source Current
V_EAIN = 0.375V, V_RUN/SS = 4.5V
SENSE1⁺, SENSE1^–, SENSE2⁺, SENSE2^–,
SENSE3⁺, SENSE3^– All Equal 1.2V; Current at Each Pin
1.5
5
µA
13
20
µA
DF_MAX
TG t_R,t_F
BG t_R, t_F
TG/BG t_1D
Maximum Duty Factor
Top Gate Rise Time
Top Gate Fall Time
Bottom Gate Rise Time
Bottom Gate Fall Time
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
In Dropout, V_SENSEMAX ≤ 30mV
C_LOAD = 3300pF
C_LOAD = 3300pF
C_LOAD = 3300pF
C_LOAD = 3300pF
All Controllers, C_LOAD = 3300pF Each Driver
95
98.5
%
30
90
ns
40
90
ns
30
90
ns
20
90
ns
50
ns
BG/TG t_2D
Bottom Gate Off to Top Gate On Delay All Controllers, C_LOAD = 3300pF Each Driver
Top Switch-On Delay Time
60
ns
t_ON(MIN)
Minimum On-Time
VID Parameters
Tested with a Square Wave (Note 5)
110
ns
VID_IL
Maximum Low Level Input Voltage
VID_IH
Minimum High Level Input Voltage
VID_PULLUP VID0 to VID4 Internal Pull-Up Current
ATTEN_ERR VID0 to VID4
Power Good Output Indication
V_VID = 0V
(Note 6)
0.4
V
2
V
3
µA
● – 0.25
0.25
%
V_PGL
PGOOD Voltage Output Low
I_PGOOD
PGOOD Output Leakage
V_PGTHNEG
V_PGTHPOS
PGOOD Trip Thesholds
V_AMPOUT Ramping Negative
V_AMPOUT Ramping Positive
V_UVDLY
Power Good Fault Report Delay
Oscillator and Phase-Locked Loop
I_PGOOD = 2mA
V_PGOOD = 5V
V_AMPOUT with Respect to Set Output Voltage,
VID Code = 11111,
PGOOD Goes Low After V_UVDLY Delay
After V_EAIN is Forced Outside V_UV Threshold
0.1
0.3
V
±1
µA
–7
–10 –13
%
7
11
13
%
100
150
µs
f_NOM
f_LOW
f_HIGH
R_PLLTH
R_{PLL IN}
I_{PLL LPF}
R_RELPHS
Nominal Frequency
Lowest Frequency
Highest Frequency
PLLIN Input Threshold
PLLIN Input Resistance
Phase Detector Output Current
Sinking Capability
Sourcing Capability
Controller 2-Controller 1 Phase
Controller 3-Controller 1 Phase
V_PLLFLTR = 1.2V
V_PLLFLTR = 0V
V_PLLFLTR = 2.4V
f_PLLIN < f_OSC
f_PLLIN > f_OSC
360
400
440
kHz
190
225
260
kHz
600
680
750
kHz
1
V
50
kΩ
20
µA
20
µA
120
Deg
240
Deg
3730fa
3