LTC3730_15 Datasheet, PDF (21/28 Pages) Linear Technology – 3-Phase, 5-Bit Intel Mobile VID, 600kHz, Synchronous Buck Controller

LTC3730
APPLICATIO S I FOR ATIO
Automotive Considerations: Plugging into the
Cigarette Lighter
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during opera-
tion. But before you connect, be advised: you are plugging
into the supply from hell. The main battery line in an
automobile is the source of a number of nasty potential
transients, including load dump, reverse battery and
double battery.
Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
The network shown in Figure 10 is the most straightfor-
ward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
should not conduct during double-battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the IC has a maximum input voltage
of 32V on the SW pins, most applications will be limited to
30V by the MOSFET BV_DSS.
V_BAT
12V
V_CC
5V
+
LTC3730
3730 F10
Figure 10. Automotive Application Protection
Design Example (Using Three Phases)
As a design example, assume V_CC = 5V, V_IN = 12V(nominal),
V_IN = 20V(max), V_OUT = 1.3V, I_MAX = 45A and f = 400kHz.
The inductance value is chosen first based upon a 30%
ripple current assumption. The highest value of ripple
current in each output stage occurs at the maximum input
voltage. Apply a 400kHz signal into the PLLIN pin or apply
1.2V to the PLLFLTR pin.
( ) ^L
=
V_OUT
f ∆I
⎛
⎝⎜^1−
V_OUT
V_IN
⎞
⎠⎟
( )( )( ) ⁼
1.3V
400kHz 30% 15A
⎛
⎝⎜^1−
1.3V
20V
⎞
⎠⎟
≥ 0.68µH
Using L = 0.6µH, a commonly available value results in
34% ripple current. The worst-case output ripple for the
three stages operating in parallel will be less than 11% of
the peak output current.
R_SENSE1, R_SENSE2 and R_SENSE3 can be calculated by using
a conservative maximum sense current threshold of 65mV
and taking into account half of the ripple current:
R_SENSE
=
65mV
⎛
15A_⎝⎜1+
34%^⎞
2 ⎠⎟
= 0.0037Ω
Use a commonly available 0.003Ω sense resistor.
Next verify the minimum on-time is not violated. The
minimum on-time occurs at maximum V_CC:
t_ON(MIN)
=
V_OUT
( ) ^V_IN(MAX) ^f
=
1.3V
20V₍400kHz₎
=
162ns
The output voltage will be set by the VID code according
to Table 1.
The power dissipation on the topside MOSFET can be
estimated. Using a Fairchild FDS6688 for example, R_DS(ON)
= 7mΩ, C_MILLER = 15nC/15V = 1000pF. At maximum input
voltage with T(estimated) = 50°C:
( ) _[ ( )( )_] ^PMAIN
≈
1.8V
20V
2
15 1+
0.005
50°C − 25°C
( ) _{( )( )} ( )( ) ^{0.007Ω +}
2^⎛
20 _{⎝⎜⎜}
45A
23
⎞
⎠⎟⎟
2Ω
1000pF
( ) ^⎛
⎝⎜ 5V
1
– 1.8V
+
1^⎞
1.8V ⎠⎟
400kHz
= 2.2W
3730fa
21