81250 Datasheet, PDF (59/64 Pages) Keysight Technologies – Agilent ParBERT 81250 Parallel Bit Error Ratio Tester

Multi-mainframe/master-slave
If the number of desired channels
exceeds the number of available
slots in the “entry” frame, it is
possible to add expander frames.
To add channels within one clock
group, there is the limit of a
maximum of two expander
frames. If data modules are
housed in an expander frame
they need an additional clock
module. This clock module must
be connected to the clock module
in the entry frame (master frame)
with the help of the master-slave
connection. This connection car-
ries the clock and data flow syn-
chronization between the frames.
The master-slave connection
hardware is delivered with the
expander frames. The master-
slave connection is only possible
between clock modules of the
same type.
Aside from the master-slave con-
nection between the clock mod-
ules, the controller interface also
needs an extension into the
expander frames:
The FireWire interface, can be
“daisy-chained” from frame to
frame. This would allow the
configuration of a ParBERT
81250 system with a virtually
unlimited number of channels.
However, as mentioned above,
a clock group can only be
constructed of up to three
VXI-frames, such that ParBERT
systems larger than three frames
must consist of more than one-
clock group.
Different clock groups
A clock group consists of a clock
module and one or more data
modules. It is possible to have
data modules from different
speed classes combined in one
clock group. The configuration
of more than one clock group is
possible. Several clock groups
may be housed in one frame.
Using expander frames is also
possible. Each clock group will
be operated from an independent
instance of the graphical user
interface, which will actually be
assigned to this set of hardware
defined as a clock group. In such
a case the different GUIs may
run from separate PCs, connect-
ed via LAN. A configuration of
more than one clock group is
recommended for the following
purposes:
• To run different speeds
(non binary ratio) between
generators and/or analyzers
• To make flexible use of data
rate range when combining
different speed classes
• To use custom (memory)
based data and use of bit
synchronization for the
analyzer(s).
The additional clock modules
necessary for the different clock
groups reduce the maximum
number of possible channels listed
in table 85 on the previous page.
A master-slave connection must
not be installed between the
clock modules if different clock
groups are desired.
ParBERT 81250 Main Overview
Page 59/64