81250 Datasheet, PDF (53/64 Pages) Keysight Technologies – Agilent ParBERT 81250 Parallel Bit Error Ratio Tester

E4805B and E4808A
central clock modules
The central clock module
includes a PLL (phase-locked
loop) frequency generator to pro-
vide a system clock. Depending on
the frequency chosen, the data
modules can be clocked at
a ratio of 1, 2, 4, 8, 16, 32, 64 or
256 times higher or lower than
the system clock.
External start/stop: The data can
be started by an external signal
applied to the external input.
When using the E4832A module,
a stop mode and a gate mode is
also available.
Ext. clock/ext. reference: This
input runs ParBERT 81250
synchronously with an ext.
clock, or when a more accurate
reference is needed than the
internal oscillator. A continuous
clock is necessary. A burst clock
cannot be used as an external
clock. Maximum external clock
is 2.7 GHz for the E4805B and
10.8 Gb/s for the E4808A. (Note:
no improvement of jitter specifi-
cations will be achieved with an
external clock).
Guided de-skew: Individual semi-
automatic deskew per channel is
available. The 15447A de-skew
probe 15447A allows de-skew on
the DUT's (device under test)
fixture.
Clock outputs for
modules
Clock for expander
frames
Clock/ref. input
External input
Trigger output
Deskew probe
Trigger pod input.
Master- slave
connection
Figure 33: Clock module
Table 67. E4805B and E4808A clock module specifications
E4805B
Frequency range (1) 1 kHz to 675 MHz
(can be entered as
period or frequency)
will run with
• E4861A (2) in range of 334 MHz to 2.7GHz
• E4832A in range of 334 KHZ to 675 MHz
Resolution
Accuracy
1 Hz
±50 ppm with internal PLL reference
E4808B
170 kHz to 675 MHz
• E4866A/E4867A (2) in range of 9.5 GHz to 10.8 GHz
• E4861B in range of 20.834 MHz to 3.35 GHz
• E4861A (2) in range of 334 MHz to 2.7 GHz
• E4832A in range of 334 KHZ to 675 MHz
1 Hz
±50 ppm with internal PLL reference
(1) May be limited or enhanced by modules or frontends
(2) Modules discontinued
ParBERT 81250 Main Overview
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