81250 Datasheet, PDF (4/64 Pages) Keysight Technologies – Agilent ParBERT 81250 Parallel Bit Error Ratio Tester

Fundamental ParBERT platform description
ParBERT 81250 is designed
as a flexible data generator/
analyzer platform for physical
layer test and characterization.
It can be used for a large variety
of applications and by this
meets your individual needs.
A module based system
The ParBERT 81250 consists of
the user SW and the ParBERT
modules. These can be
categorized by their maximum
data rate (675Mb/s, 3.35Gb/s
and 7/13.5Gb/s) and their
functionality (clock or data).
A minimum system consists of
one clock module and one data
module forming a so-called clock
group which is installed in the
ParBERT VXI-mainframe. The
mainframe can hold multiple
clock groups; each is operated
through its own graphical user
interface (GUI).
Three main speed classes
The high-speed modules for 13.5
Gb/s and 7 Gb/s are dedicated
generator or analyzer modules
with one data channel each. The
generators provide differential
data and full rate clock output.
They are equipped with an
externally voltage controllable
delay line to generate data
streams with up to 200ps of
peak-to-peak jitter. The analyzer
modules feature an integrated
clock data recovery CDR.
The 3.35 Gb/s data modules
can carry up to two generator
or analyzer front-ends of any
combination. Equivalent to
the high speed modules the
generator front-ends feature a
voltage controlled delay for jitter
generation but, according to the
lower data rate, with a wider
range of 500ps.
The 675 Mb/s data module
back-ends can hold up to four
generator or analyzer front ends
and combinations thereof. A
special capability of these back-
end modules is the internal
digital and analog channel-
add function which e.g. allows
generation of multi-level signals.
Up to 132 channels
ParBERT 81250 uses the
standard VXI mainframe with its
13 slots, where the leftmost slot
is always reserved for the so-
called slot-0 controller so that 12
slots are available for ParBERT-
modules, i.e. clock and data. A
maximum of three mainframes
can be combined to form a clock
synchronous system, which for
the 675Mb/s speed class and
its 1-slot-wide clock module
per frame yields up to 132 data
channels (3 x 11 x 4).
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ParBERT 81250 Main Overview