81250 Datasheet, PDF (32/64 Pages) Keysight Technologies – Agilent ParBERT 81250 Parallel Bit Error Ratio Tester

Sequencing
The sequencer receives instructions
from the central sequencer and
generates a sequence. The chan-
nel sequencer can generate a
sequence with up to 60 segments.
An analyzer channel generates
feedback signals that can
control the channel sequencer
and/or the central sequencer.
With parallel analyzer channels,
the feedback is routed to the
central sequencer to allow a
common response of all parallel
channels. With single receive
channel, the channel sequencer
itself handles the feedback signals.
Pattern generation
The data stream is composed
of segments. A segment can be
made up of a memory-based
pattern, memory-based PRBS
or hardware generated PRBS.
A total of 64 Mbit (at segment
length resolution 512 bits)
are available for memory-
based pattern and PRBS.
Memory-based PRBS is limited to
2¹⁵ - 1 or shorter. Memory-based
PRBS allows special PRBS modes
like zero substitution (also known
as extended zero run) and
variable mark ratio.
Table 29. N4874A pattern and sequencing
Segment length resolution 512 bit
Patterns:
Memory based
up to 64 Mbit
PRBS/PRWS
2ⁿ - 1, n = 7, 9, 10, 11, 15, 23, 31
Mark density
1/8, 1/4, 1/2, 3/4, 7/8 at 2ⁿ - 1, n = 7, 9, 10, 11, 15
Errored PRBS/PRWS 2ⁿ - 1, n = 7, 9, 10, 11, 15
Extended ones or zeros 2ⁿ - 1, n = 7, 9, 10, 11, 15
Clock patterns
Divide or multiply by 1, 2, 4
PRWS port width
1, 2 , 4, 8, 16
A zero substitution pattern
extends the longest zero series by
a user selectable number of addi-
tional zeroes. The next bit follow-
ing these zero series will be
forced to 1. Mark ratio is the
ratio of 1 s and 0 s in a PRBS
stream, which is 1/2 in a normal
PRBS. Variable mark ratio allows
values of 1/8, 1/4, 1/2, 3/4 and 7/8.
Due to granularity reasons a
PRBS has to be written to RAM
several times, at a multiplexing
factor of 512 the number of repe-
titions is also 512. That means that
a 2¹⁵ - 1 PRBS uses up to 16 Mbit
of the memory. Hardware-based
PRBS can be a polynomial up to
2³¹ - 1. No memory is used for
hardware-based pattern genera-
tion. Error insertion allows
inserting single or multiple
errors into a data stream. So
instead of a 0 a 1 is generated
and vice versa.
Table 30. Data rate range, segment length resolution, available memory for synchronization and
fine delay operation
Data rate range
(Mbit/s)
620 … 1.350,000
620 … 2.700,000
620 … 5.400,000
620 … 7.000,000
620 … 7.000,000
Segment length
resolution
32 bits
64 bits
128 bits
256 bits
512 bits
Maximum memory
depth (bits)
4,194,304
8,388,608
16,777.216
33,554.432
67,108.864
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