81250 Datasheet, PDF (50/64 Pages) Keysight Technologies – Agilent ParBERT 81250 Parallel Bit Error Ratio Tester

Master slave, multi-mainframe,
different clock groups
Up to 3 clock modules can be
combined to run in one clock
grouping by connecting the mas-
ter slave cable. This is used to
combine channels which do not
fit into one frame into one clock
group. Omitting the master-slave
connection will run the channels
as separate clock groups. A
system can be a combination
of multiple clock groups made
up of multiple channels. The
frequencies used can be totally
asynchronous or m/n ratio (see
clock input multiplier/divider).
For separated clock groups the
master slave is not used. Within
one master-slave system the
modules must be the same type.
Table 61. E4809A, E4808A and E4805B trigger pod characteristics
Input lines
Input levels
Input threshold
Input termination
Absolute max ratings for
input voltages
Cable delay
sampling clock frequency
Setup time (1)
Hold time (1)
8, single-ended
TTL compatible
1.5 V
5 kΩ pullup to +5 V
–1.2 V to + 7.0 V
11 ns typical
system frequency/segment length resolution
TRIGGER OUTPUT
2.5 ns
5 ns
CLOCK/REF INPUT
–12.5 ns
20 ns
(1) Includes the cable delay
Table 62. E4809A clock module specifications
Frequency range
20.834 MHz…13,5 GHz
Resolution
1 Hz
SSB phase noise (at 10 kHz offset)
< -75 dBc at 10 GHz
Latency external start input
• Start IN to Trig OUT with 7/13.5 Gb/s 16 ns + (2 * system clock *
segment resolution) ± 1 clock (1)
• Start IN to Data OUT with 7/13.5 Gb/s 416 ns + (2 * system clock *
segment resolution) ± 1 clock (1)
• IN to Trig OUT without 7/13.5 Gb/s 16 ns ± 1 clock
(1)
• IN to Data OUT without 7/13.5 Gb/s 48 ns ± 1 clock
(1)
(1) Add 3 ns if expander frame is used
Clocks for expander frames
Giga clock
System clock outputs
Clock input
Trigger output
10 MHz reference in
E4809A 13.5 GHz central
clock module
General
E4809A is a 2-slot central clock
module with 13GHz clock distribu-
tion. ParBERT 81250 13.5 Gb/s
modules are designed to run with
the E4809A 13.5 GHz central clock
module.
Figure 30. E4809A module
Start in
Trigger pod master/slave connection
De-skew probe
Page 50/64
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