ISL6328 Datasheet, PDF (7/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
Functional Pin Descriptions (Continued)
PIN NAME
PWROK
PWM3, PWM4
PHASE_NB
UGATE_NB
BOOT_NB
LGATE_NB
PVCC
PIN NUMBER
35
37, 36
38
39
40
41
42
DESCRIPTION
System wide Power Good input signal. If this pin is low, the two SVI bits are decoded to determine the
“metal VID”. When pin is high, the SVI is actively running its protocol.
Pulse-width modulation outputs. Connect these pins to the PWM input pins of an Intersil driver IC if
3- or 4-phase operation is desired. Connect the ISEN- pins of the channels not desired to +5V to disable
them. Channels must be disabled in decremental order.
Connect this pin to the source of the corresponding upper MOSFET. This pin is the return path for the
upper MOSFET drive. This pin is used to monitor the voltage drop across the upper MOSFET for
overcurrent protection.
Connect this pin to the corresponding upper MOSFET gate. This pin provides the PWM-controlled gate
drive for the upper MOSFET and is monitored for shoot-through prevention purposes.
This pin provides the bias voltage for the corresponding upper MOSFET drive. Connect this pin to
appropriately-chosen external bootstrap capacitor. The internal bootstrap diode connected to the PVCC
pin provides the necessary bootstrap charge.
Connect this pin to the corresponding MOSFET’s gate. This pin provides the PWM-controlled gate drive
for the lower MOSFET. This pin is also monitored by the adaptive shoot-through protection circuitry to
determine when the lower MOSFET has turned off.
The power supply pin for the internal MOSFET drivers. Connect this pin to +12V. This pin is the input to
the internal LDO for GVOT. Decouple this pin with a quality 1.0µF ceramic capacitor.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL6328CRZ
ISL6328 CRZ
0 to +70
48 Ld 6x6 QFN
L48.6x6B
ISL6328IRZ
ISL6328 IRZ
-40 to +85
48 Ld 6x6 QFN
L48.6x6B
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6328. For more information on MSL please see techbrief TB363.
7
FN7621.1
June 7, 2011