ISL6328 Datasheet, PDF (14/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
Continuous Current Sampling
In order to realize proper current-balance, the currents in each
channel are sampled continuously every switching cycle. During
this time, the current-sense amplifier uses the ISEN inputs to
reproduce a signal proportional to the inductor current, I_L. This
sensed current, I_SEN, is simply a scaled version of the inductor
current.
PWM
SWITCHING PERIOD
I_L
MOSFET
DRIVER
V_IN
UGATE(n)
LGATE(n)
IL_n
L
DCR
INDUCTOR
V_L(s)
V_C(s)
R₁
C
V_OUT
C_OUT
ISL6328 INTERNAL
CIRCUIT
I_n
+
-
R₂
ISENn-
ISENn+
C_ISEN
V_C(s)
I_SEN
R_ISEN
I_SEN
TIME
FIGURE 3. CONTINUOUS CURRENT SAMPLING
The ISL6328 supports Inductor DCR current sensing to continuously
sample each channel’s current for channel-current balance. The
internal circuitry shown in Figure 4 represents Channel n of an
n-Channel converter. This circuitry is repeated for each channel in
the converter, but may not be active depending on how many
channels are operating.
Inductor windings have a characteristic distributed resistance or
DCR (Direct Current Resistance). For simplicity, the inductor DCR
is considered as a separate lumped quantity, as shown in
Figure 4. The channel current I_Ln, flowing through the inductor,
passes through the DCR. Equation 5 shows the S-domain
equivalent voltage, V_L, across the inductor.
V_L(s) = I_Ln ⋅ (s ⋅ L + DCR)
(EQ. 5)
A simple R-C network across the inductor (R₁, R₂ and C) extracts
the DCR voltage, as shown in Figure 6. The voltage across the
sense capacitor, V_C, can be shown to be proportional to the
channel current I_Ln, shown in Equation 6.
⎛
⎝
-^s-----^â‹---^L--
DCR
+
1_⎠⎞
V_C(s)
=
-----------------------------------------------------
⎛
⎜s
⎝
⋅
(_---R_----1-----⋅_---R_----2----)
R₁ + R₂
⋅
C
+
⎞
1⎟
⎠
⋅ K ⋅ DCR ⋅ I_Ln
(EQ. 6)
Where:
K
=
-------^R----²---------
R₂ + R₁
(EQ. 7)
If the R-C network components are selected such that the RC
time constant matches the inductor L/DCR time constant (see
Equation 8), then V_C is equal to the voltage drop across the DCR
FIGURE 4. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
multiplied by the ratio of the resistor divider, K. If a resistor
divider is not being used, the value for K is 1.
-----^L------
DCR
=
-^R-----¹----^â‹---^R----²---
R₁ + R₂
⋅
C
(EQ. 8)
The capacitor voltage V_C, is then replicated across the effective
internal sense resistor, R_ISEN. This develops a current through
R_ISEN which is proportional to the inductor current. This current,
I_SEN, is continuously sensed and is then used by the controller for
load-line regulation, channel-current balancing, and overcurrent
detection and limiting. Equation 9 shows that the proportion
between the channel current, I_L, and the sensed current, I_SEN, is
driven by the value of the effective sense resistance, R_ISEN, and
the DCR of the inductor.
I_SEN
=
I_L
⋅
--^D-----^C----^R----
R_ISEN
(EQ. 9)
The Northbridge regulator samples the load current in the same
manner as the Core regulator does.
The sampled currents, I_n, from each active channel are summed
together and divided by the number of active channels. this
current is then gained by 30%. The resulting cycle average
current, I_AVG, provides a measure of the total load-current
demand on the converter during each switching cycle. Assuming
that the current in all the active channels is balanced, the
average sensed current can be calculated from Equation 10.
I_AVG
=
I_{--L---o----a---d- ⋅ --D-----C----R----}
N R_ISEN
(EQ. 10)
In the ISL6328, the average scaled version of the load current,
I_AVG, has a 100µA range. At 100µA, the Overcurrent Protection
circuitry is enabled (refer to the “Overvoltage Protection” on
page 21 for detailed information). It is recommended that the
maximum load current correlate to an average sensed current,
I_AVG, of 80µA.
14
FN7621.1
June 7, 2011